公开(公告)号：US11107743B2

公开(公告)日：2021-08-31

申请号：US16673127

申请日：2019-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-Tae Hwang ,  Jae-Choon Kim ,  Kyung-Suk Oh ,  Woon-Bae Kim ,  Jae-Min Jung

IPC: H01L23/31 ,  H01L23/498 ,  H05K1/14

Abstract: A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.

公开(公告)号：US09362333B2

公开(公告)日：2016-06-07

申请号：US14327138

申请日：2014-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Min Jung ,  Jeong-Kyu Ha

IPC: H01L27/15 ,  H01L23/498 ,  H01L23/538 ,  H01L23/14 ,  H01L23/00

CPC classification number: H01L27/15 ,  H01L23/145 ,  H01L23/4985 ,  H01L23/5387 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2924/014

Abstract: Semiconductor packages are provided. A semiconductor package may include a semiconductor chip. The semiconductor package may include a substrate and first and second conductive regions on the substrate. In some embodiments, the substrate may be a flexible substrate, and the first and second conductive regions may be on the same surface of the flexible substrate. Display devices including semiconductor packages are also provided. In some embodiments, a display device may include a flexible substrate that is bent such that first and second conductive regions thereof are connected to each other via an intervening third conductive region.

Abstract translation: 提供半导体封装。 半导体封装可以包括半导体芯片。 半导体封装可以包括衬底和衬底上的第一和第二导电区域。 在一些实施例中，衬底可以是柔性衬底，并且第一和第二导电区域可以在柔性衬底的相同表面上。 还提供了包括半导体封装的显示装置。 在一些实施例中，显示装置可以包括弯曲的柔性基板，使得其第一和第二导电区域经由居间的第三导电区域相互连接。

公开(公告)号：US09313889B2

公开(公告)日：2016-04-12

申请号：US14262658

申请日：2014-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyoungsuk Yang ,  Jeong-Kyu Ha ,  PaLan Lee ,  Narae Shin ,  Soyoung Lim ,  Jae-Min Jung ,  KyongSoon Cho

IPC: H05B33/00 ,  H05K1/02 ,  H05K5/00 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18

CPC classification number: H05K1/118 ,  H05K1/147 ,  H05K1/189 ,  H05K2201/0949 ,  H05K2201/10128

Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.

Abstract translation: 提供了一种显示装置。 显示装置包括显示面板，具有连接到显示面板的后表面的柔性电路薄膜和与背面相对的前表面，前表面具有安装在其上的芯片，以及第一引线接合部分， 芯片到显示面板。 第一引线接合部分包括连接到芯片并覆盖柔性电路膜的一部分的第一部分，穿过柔性电路膜的第二部分和设置在柔性电路膜和后面的显示面板之间的第三部分 柔性电路膜的表面，其中第三部分与第一部分重叠。

公开(公告)号：US20240421056A1

公开(公告)日：2024-12-19

申请号：US18515441

申请日：2023-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Min Jung

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes: a substrate including a chip region and an edge region extending around the chip region; a plurality of film wirings on the substrate in the chip region; an input wiring and an output wiring on the substrate in the edge region and extending to the chip region in a direction parallel to an upper surface of the substrate; and a semiconductor chip on the substrate in the chip region and electrically connected to the input wiring and the output wiring. The substrate includes a through hole extending through the substrate in a second direction perpendicular to the first direction, and the through hole is between the film wirings.

公开(公告)号：US11756850B2

公开(公告)日：2023-09-12

申请号：US17462269

申请日：2021-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-Tae Hwang ,  Jae-Choon Kim ,  Kyung-Suk Oh ,  Woon-Bae Kim ,  Jae-Min Jung

IPC: H01L23/31 ,  H01L23/498 ,  H05K1/14

CPC classification number: H01L23/3135 ,  H01L23/4985 ,  H01L23/49838 ,  H05K1/147 ,  H05K2201/049 ,  H05K2201/10128

Abstract: A chip on film package includes: a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.

公开(公告)号：US09620389B2

公开(公告)日：2017-04-11

申请号：US14967490

申请日：2015-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Kyu Ha ,  Youngshin Kwon ,  KwanJai Lee ,  Jae-Min Jung ,  KyongSoon Cho ,  Sang-Uk Han

IPC: H01L23/14 ,  H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H05K3/10 ,  H01L23/00 ,  H01L23/495 ,  H05K3/00 ,  H01L21/56 ,  H01L21/78 ,  H05K1/18 ,  H05K3/42

CPC classification number: H01L21/486 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/78 ,  H01L23/145 ,  H01L23/49524 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/50 ,  H01L2924/12042 ,  H05K1/114 ,  H05K1/115 ,  H05K1/189 ,  H05K3/0052 ,  H05K3/107 ,  H05K3/42 ,  H05K2203/1545 ,  Y10T156/1052 ,  H01L2924/00

Abstract: A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.

公开(公告)号：US09349683B2

公开(公告)日：2016-05-24

申请号：US14714234

申请日：2015-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Min Jung ,  Jeong-Kyu Ha

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L23/48

CPC classification number: H01L23/4985 ,  G02F1/13452 ,  G02F1/13458 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/86 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/83104 ,  H01L2224/83862 ,  H01L2224/86203 ,  H01L2924/00014 ,  H05K1/028 ,  H05K1/112 ,  H05K1/118 ,  H05K1/189 ,  H05K2201/055 ,  H05K2201/09227 ,  H05K2201/10128 ,  H05K2201/10674 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A chip-on-film package comprises a film substrate comprising upper and lower surfaces, and a side having a bending part. A first output interconnection formed on the upper surface of the film substrate extends from a semiconductor chip disposed on the upper surface toward the bending part. A second output interconnection includes an upper output interconnection formed on the upper surface of the film substrate, and a lower output interconnection formed on the lower surface and extending onto the bending part. An input interconnection includes an upper input interconnection formed on the upper surface of the film substrate and a lower input interconnection formed on the lower surface and extending away from the bending part. Through-vias are formed to pass through the film substrate and electrically connect the upper output interconnection to the lower output interconnection, and the upper input interconnection to the lower input interconnection.

Abstract translation: 片上胶卷包装包括一个包括上表面和下表面的薄膜基材和一个具有弯曲部分的一面。 形成在薄膜基板的上表面上的第一输出互连件从设置在上表面上的半导体芯片朝向弯曲部分延伸。 第二输出互连包括形成在薄膜基板的上表面上的上输出互连和形成在下表面上并延伸到弯曲部上的下输出互连。 输入互连包括形成在薄膜基板的上表面上的上输入互连和形成在下表面上并且远离弯曲部延伸的下输入互连。 通孔形成为通过薄膜基板并将上部输出互连电连接到下部输出互连，并将上部输入互连电连接到下部输入互连。

公开(公告)号：US11830803B2

公开(公告)日：2023-11-28

申请号：US17699525

申请日：2022-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanjai Lee ,  Jae-Min Jung ,  Jeong-Kyu Ha ,  Sang-Uk Han

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/4985 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/73 ,  H01L2224/73204

Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.

公开(公告)号：US11600556B2

公开(公告)日：2023-03-07

申请号：US17230662

申请日：2021-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minki Kim ,  Duckgyu Kim ,  Jae-Min Jung ,  Jeong-Kyu Ha ,  Sang-Uk Han

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367

Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, a first chip pad on a bottom surface of the semiconductor chip and adjacent to a first lateral surface in a first direction of the semiconductor chip, the first lateral surface separated from the first chip pad from a plan view in a first direction, and a first lead frame coupled to the first chip pad. The first lead frame includes a first segment on a bottom surface of the first chip pad and extending from the first chip pad in a second direction opposite to the first direction and away from the first lateral surface of the semiconductor chip, and a second segment which connects to a first end of the first segment and then extends along the first direction to extend beyond the first lateral surface of the semiconductor chip after passing one side of the first chip pad, when viewed in the plan view.

公开(公告)号：US20200303276A1

公开(公告)日：2020-09-24

申请号：US16673127

申请日：2019-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Tae Hwang ,  Jae-Choon Kim ,  Kyung-Suk Oh ,  Woon-Bae Kim ,  Jae-Min Jung

IPC: H01L23/31 ,  H01L23/498 ,  H05K1/14

Abstract: A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.