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公开(公告)号:KR1020120005937A
公开(公告)日:2012-01-17
申请号:KR1020110043716
申请日:2011-05-11
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: H01L21/027
CPC classification number: G03F7/16 , H01L21/6715 , H01L21/0274
Abstract: PURPOSE: A coating and developing apparatus, a method thereof, and a memory medium are provided to apply a unit block for a dual developing process, thereby suppressing the degradation of operation efficiency of the coating and developing apparatus. CONSTITUTION: A carrier block(S1) comprises a loading stand(11) which loads a carrier(C), an opening and closing part(12), and a transfer arm. The transfer arm comprises five wafer holding support parts in up and down directions. A processing block(S2) comprises unit blocks(B1-B6) which perform liquid processing process in a wafer. The unit block comprises a heating module, a main arm, and a return region. A liquid processing unit comprises an antireflection film formation module(BCT1, 2) and a resist film formation module(COT1,2).
Abstract translation: 目的:提供一种涂布和显影装置,其方法和存储介质以应用用于双显影处理的单位块,从而抑制涂层和显影装置的操作效率的劣化。 构成:载体块(S1)包括装载载体(C)的装载台(11),开闭部分(12)和传送臂。 传送臂在上下方向上包括五个晶片保持支撑部。 处理块(S2)包括在晶片中执行液体处理处理的单元块(B1-B6)。 单元块包括加热模块,主臂和返回区域。 液体处理单元包括防反射膜形成模块(BCT1,2)和抗蚀膜形成模块(COT1,2)。
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公开(公告)号:KR101595593B1
公开(公告)日:2016-02-18
申请号:KR1020110043716
申请日:2011-05-11
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: H01L21/027
CPC classification number: G03F7/16 , H01L21/6715
Abstract: 본발명의과제는처리블록의설치면적을억제하는동시에장치의가동효율의저하를억제할수 있는기술을제공하는것이다. 검사모듈에의한검사에서기판에이상이검출되었을때에, 기억부에기억된데이터에기초하여, 후속의기판의반송모드를, 모드 M1 및 M2로부터선택하기위한모드선택부를구비하도록도포, 현상장치를구성한다. 상기모드 M1은현상처리용단위블록에있어서의기판이처리된모듈을특정하여, 후속의기판을, 특정된모듈이외의모듈로반송하도록단위블록용반송기구의동작을제어하는모드이고, 상기모드 M2는기판이처리된현상처리용단위블록을특정하여, 후속의기판을, 특정된현상처리용단위블록이외의현상처리용단위블록으로반송하도록전달기구의동작을제어하는모드이다.
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