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公开(公告)号:US3695855A
公开(公告)日:1972-10-03
申请号:US3695855D
申请日:1970-01-08
Applicant: IBM
Inventor: AINSLIE NORMAN G , CHEROFF GEORGE , JUNCTION HOPEWELL , GRAFF WILLIAM S , HOWARD JAMES KENT , ROSS RUPERT F
CPC classification number: H01L21/00 , H01L21/28 , H05K1/09 , Y10S428/929 , Y10S428/938 , Y10T29/49004 , Y10T428/12396 , Y10T428/12458 , Y10T428/12486 , Y10T428/12528 , Y10T428/12847 , Y10T428/12903
Abstract: THIS INVENTION PROVIDES A MEANS OF INCREASING THE TIMETO-FAILURE OF DOPED CONDUCTIVE STRIPES BY DEPOSITING REGIONS OF DOPANT REJUVENANT UPON REGIONS IN THE STRIPE WHEREIN DOPANT DEPLETION IS MOST APT TO OCCUR UNDER CURRENT STRESS. THIS INVENTION ALSO PROVIDES A MEANS OF REJUVENATING REGIONS WHEREIN DOPANT DEPLETION HAS OCCURRED BY PERIODICALLY APPLYING HEAT TO A MICROELECTONIC CONFIGURATION CONTAINING DOPED CONDUCTIVE THIN FILMS FOR INTERCONNECTION PURPOSES, SAID THIN FILMS CONTAINING LOCAL, DISCONTINUOUS DEPOSITS OF DOPANT REJUVENANT OVER REGIONS WITHIN THE FILM WHEREIN TEMPERATURE GRADIENTS OR DIFFUSION BARRIERS ARISE UNDER CURRENT STRESS RESULTING IN MASS FLUX DIVERGENCES IN SAID REGIONS, I.E., A RESULTANT EFFLUX OF DOPANT FROM SAID REGION. APPLICATION OF HEAT IN THIS MANNER PERMITS DIFFUSION OF DOPANT REJUVENANT FROM THE LOCALIZED DOPANT REJUVENANT SOURCE INTO THE REGION FROM WHICH DOPANT HAS MIGRATED DURING SERVICE, THEREBY REJUVENATING THE MICROELECTRONIC CONFIGURATION AND ENABLING ITS CONTINUED USE.
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公开(公告)号:CH600575A5
公开(公告)日:1978-06-15
申请号:CH1006676
申请日:1976-08-06
Applicant: IBM
Inventor: JOY RICHARD CARLTON , MAGDO INGRID EMESE , JUNCTION HOPEWELL , PHILLIPS ALFRED JR
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公开(公告)号:DE1817480A1
公开(公告)日:1970-03-19
申请号:DE1817480
申请日:1968-12-30
Applicant: IBM
Inventor: F MILLER LEWIS , E MEISSER JUN KENNETH , J PUTTLITZ KARL , K SPIELBERGER RICHARD , JUNCTION HOPEWELL
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公开(公告)号:DE1901815A1
公开(公告)日:1970-08-27
申请号:DE1901815
申请日:1969-01-15
Applicant: IBM
Inventor: DUDLEY BERNARD JOHN , ROBERT GIEDD GARY , FALLS WAPPINGERS , CARMEN GAITO CARL , HAROLD PERKINS MERLYN , JUNCTION HOPEWELL , GRANGER GREENE THOMAS , WILLIAM LIND JAMES , MARK PROSS CHARLES
IPC: G01R31/317 , G01R31/319 , G01R31/3193 , G01R31/00
Abstract: A test system is provided for performing functional tests on combinatorial and sequential monolithic devices with the testing automatically programmed under control of a computer processing unit. The test results can be printed out on a printer, logged on tape and/or punched on cards.
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公开(公告)号:CH597691A5
公开(公告)日:1978-04-14
申请号:CH1320176
申请日:1976-10-19
Applicant: IBM
IPC: H01L21/76 , H01L21/3105 , H01L21/316 , H01L21/331 , H01L21/762 , H01L29/73
Abstract: A semiconductor device, such as a transistor, integrated circuit or the like, having a pattern of oxidized and densified porous silicon regions extending onto one of its major surfaces for isolating regions of the semiconductor is manufacturable by a relatively simple process. The process involves forming porous silicon regions in the surface of the semiconductor body such as a silicon wafer, in the areas where dielectric isolation between semiconductor devices is desired. The porous silicon regions are then oxidized at a temperature sufficient to completely oxidize the porous silicon. The oxidiation is such that the oxidized porous silicon extends above the surface of the semiconductor wafer. The oxidized porous silicon regions are then subjected to a temperature higher than the oxidizing temperature utilized in the previous step to cause the densification of the oxidized porous silicon regions. The result of this densification step is the collapse of the porous oxide to a dense structure which is substantially planar with the surface of the semiconductor wafer. This densified silicon dioxide structure has an etch rate which is substantially the same as thermally grown silicon dioxide.
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