BALLISTIC CONDUCTION TRANSISTOR
    2.
    发明专利

    公开(公告)号:DE3379091D1

    公开(公告)日:1989-03-02

    申请号:DE3379091

    申请日:1983-02-01

    Applicant: IBM

    Abstract: A majority carrier ballistic conduction transistor is fabricated with a built-indifference in barrier height ( DIAMETER a, DIAMETER b) between the emitter/base and collector/base interfaces by employing surface Fermi level pinning in a crystalline structure with three coplanar regions of different semiconductor materials. The central region base 3 has a thickness of the order of the mean free path of en electron. The materials of the external regions (2, 4) are such that there is a mismatch between the crystal spacing of the external regions and the central region which causes the Fermi level of the material in the central region to be pinned in the region of the conduction band at the interfaces with the external regions and the material of the external regions is selected so that the surface Fermi level is pinned in the forbidden region. A monocrystalline structure having an emitter region (2) of GaAs, a base region (3) of InAs or W 100Ato 500Athick and a collector region (4) of GainAs provides switching in the range of 10 seconds.

Patent Agency Ranking