公开(公告)号：WO0223634A3

公开(公告)日：2002-06-20

申请号：PCT/US0128678

申请日：2001-09-14

Applicant: ATHEROS COMM INC

Inventor： WEBER DAVID J ,  YUE PATRICK ,  SU DAVID

IPC: H01L23/66 ,  H01L27/088 ,  H03F1/22 ,  H03F1/52 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45 ,  H04B1/04

CPC classification number: H01L24/06 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L27/088 ,  H01L2223/6644 ,  H01L2224/05554 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01031 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H03F1/223 ,  H03F3/24 ,  H03F3/45188 ,  H03F2200/06 ,  H03F2203/45638 ,  H03F2203/45652 ,  H04B2001/0408 ,  Y10S977/724 ,  H01L2924/00 ,  H01L2224/45099

Abstract: The present invention provides a breakdown resistant transistor structure for amplifying communication signals. This structure includes a first NMOS transistor having a source connected to ground and a first gate for receiving the input radio frequency signal. The first gate is disposed above a first insulator and the first NMOS transistor having a first transconductance and a first breakdown voltage associated therewith. Also included is a second NMOS transistor having a source connected to the drain of the first NMOS transistor, a gate connected to reference DC voltage, and a drain that provides the output for the amplified radio signal, the load being disposed between the reference DC voltage and the drain of the second NMOS transistor. The second gate is disposed above a second insulator, the second NMOS transistor has a second transconductance and a second breakdown voltage associated therewith, and the second insulatory may be thicker than the first insulator. This results in the first transconductance being greater than the second transconductance, and the second breakdown voltage being greater than the first breakdown voltage.

Abstract translation: 本发明提供一种用于放大通信信号的耐击穿晶体管结构。 该结构包括具有连接到地的源极的第一NMOS晶体管和用于接收输入射频信号的第一栅极。 第一栅极设置在第一绝缘体之上，并且第一NMOS晶体管具有与之相关联的第一跨导和第一击穿电压。 还包括第二NMOS晶体管，其源极连接到第一NMOS晶体管的漏极，连接到参考DC电压的栅极和为放大的无线电信号提供输出的漏极，负载被布置在参考DC电压 和第二NMOS晶体管的漏极。 第二栅极设置在第二绝缘体上方，第二NMOS晶体管具有与之相关联的第二跨导和第二击穿电压，并且第二绝缘体可以比第一绝缘体厚。 这导致第一跨导大于第二跨导，并且第二击穿电压大于第一击穿电压。

公开(公告)号：WO0182544A3

公开(公告)日：2002-03-14

申请号：PCT/US0112935

申请日：2001-04-21

Applicant: ATHEROS COMM INC

Inventor： MCFARLAND WILLIAM

IPC: H04L5/02 ,  H04L27/26

CPC classification number: H04L5/023

Abstract: A communication system such as an OFDM or DMT system has nodes which are allowed to transmit continuously on one or just a few of the system's frequency sub-channels, while the other nodes avoid putting any signal into those sub-channels. Simple low data rate nodes are allowed to use a small number of sub-channels while more complicated nodes use the remainder. A control protocol allows the sharing in time of communications using overlaid and non-overlaid multi-carrier communication techniques. The sharing in time can be done using TDMA, CSMA or polling techniques. In each case, mechanisms are provided for bringing new nodes into the network and for insuring the time alignment of overlaid transmissions. Reliable transmissions are insured through acknowledgement and retransmission facilities.

Abstract translation: 诸如OFDM或DMT系统的通信系统具有允许在系统的一个或仅几个频率子信道上连续发送的节点，而其他节点避免将任何信号放入那些子信道。 允许简单的低数据速率节点使用少量子信道，而更复杂的节点使用余数。 控制协议允许使用覆盖和非覆盖的多载波通信技术在通信时间上共享。 时间共享可以使用TDMA，CSMA或轮询技术完成。 在每种情况下，都提供了将新节点引入网络并确保重叠传输的时间对齐的机制。 通过确认和重传设施保证可靠的传输。

公开(公告)号：CA2386885C

公开(公告)日：2013-12-03

申请号：CA2386885

申请日：2000-10-11

Applicant: ATHEROS COMM INC

Inventor： MENG TERESA H ,  SU DAVID ,  ZARGARI MASOUD

IPC: H04L7/00 ,  H04L27/233 ,  H03J7/04 ,  H04J3/06 ,  H04L27/00

Abstract: The present invention aims at eliminating the effects of frequency offsets between two transceivers by adjusting frequencies used during transmission. In this invention, methods for correcting the carrier frequency and the sampling frequency during transmission are provided, including both digital and analog implementations of such methods. The receiver determines the relative frequency offset between the transmitter and the receiver, and uses this information to correct this offset when the receiver transmits its data to the original transmitter in the return path, so that the signal received by the original transmitter is in sampling and carrier frequency lock with the original transmitter's local frequency reference.

公开(公告)号：CA2541601C

公开(公告)日：2012-09-11

申请号：CA2541601

申请日：2004-10-06

Applicant: ATHEROS COMM INC

Inventor： TEHRANI ARDAVAN M ,  CHOI WON-JOON ,  GILBERT JEFFREY M ,  WANG YI HSIU

IPC: H04L27/26 ,  H04B7/08

Abstract: The present invention provides an apparatus and method of multiple antenna receiver combining of high data rate wideband packetized wireless communication signals, where the apparatus includes M receive antennas, receiving M high data rate wideband packetized wireless communication signals, where each of the signals includes N frequency bins. The apparatus, in an exemplary embodiment, includes (1) a joint timing recovery units that perform joint coarse signal timing estimation, joint frequency offset estimation, and joint fine timing estimation on each of the signals, (2) M Fast Fourier Transform units (FFTs) that each convert the digital data for each of the M signals into frequency domain information for each of the N received frequencies and that output Q pilots for each of the signals, where Q is a positive integer, and (3) a combiner that weights and combines the outputs of the M FFTs for each of the N received frequencies.

公开(公告)号：AT521170T

公开(公告)日：2011-09-15

申请号：AT09178487

申请日：2008-06-04

Applicant: ATHEROS COMM INC ,  MAINNET COMM LTD

Inventor： YONGE LAWRENCE ,  KATAR SRINIVAS ,  GOLDFISHER SHMUEL ,  GEVA EREZ

IPC: H04L12/56 ,  H04B3/54 ,  H04L12/403 ,  H04L45/121 ,  H04L45/122 ,  H04L45/125 ,  H04L45/16

Abstract: In a network, some data are transmitted between stations during time slots in contention free periods. Selecting the time slots includes collecting timing information at some stations in the network. The timing information indicates the times of existing time slots used by stations whose transmissions can be reliably received by the station collecting the timing information. The timing information is distributed to other stations in the network. A new time slot for transmission between a first and a second station is selected based at least on timing information indicating the times of existing time slots used by stations whose transmissions can be reliably received by at least one of the first and second station. The network is preferably a Broadband Power Line Network, BPLN, which comprises a Head End station HE and a plurality of Repeaters R1,R2. TDMA schedule information for contention-free access of stations to the medium is communicated in beacons.

公开(公告)号：AT517356T

公开(公告)日：2011-08-15

申请号：AT02737486

申请日：2002-06-11

Applicant: ATHEROS COMM INC

Inventor： MCFARLAND WILLIAM ,  ZENG CHAOHUANG ,  DHAMDHERE DEEPAK

IPC: G01S7/02 ,  H04L12/56 ,  H04L12/28 ,  H04W24/00 ,  H04W28/04 ,  H04W72/02 ,  H04W84/12

Abstract: A system for detecting and avoiding interference with radar signals in wireless network devices is described. The receiver circuit of the device receives incoming 5 GHz traffic. Such traffic could comprise both WLAN traffic as well as radar signals from radar systems. The incoming packets are treated as an input event, and are screened to be examined as radar pulses. Radar pulses are identified using the length of the detected event. The radar pulses are examined using frequency domain analysis, and the packet train is examined to find gaps between radar pulses. The periodic nature of the packet is determined using frequency domain and time domain analysis to calculate the period of the pulse train. Particular intervals within the pulse train are analyzed using threshold numbers of periodic pulses within the interval and threshold power levels for the pulses. The calculated period information is used to identify the radar source and screen non-radar traffic.

公开(公告)号：DE60141968D1

公开(公告)日：2010-06-10

申请号：DE60141968

申请日：2001-09-12

Applicant: ATHEROS COMM INC

Inventor： DAVIDSON ANDREW M ,  NG TAO-FEI S ,  KUSKIN JEFFREY SCOTT ,  DHAMDHERE DEEPAK PRABHAKAR ,  CAIN FIONA J

IPC: H04L12/28 ,  H04W28/12 ,  H04L29/08 ,  H04W24/00 ,  H04W28/10 ,  H04W72/12 ,  H04W84/18

Abstract: Systems and methods to provide ordered transmission of data packets to multiple destinations are presented. A transmission device includes a transmitter, a data packet ordering unit, a state table, and a transmit management interface such as a hardware/software unit. The state table stores a transmit block status of each destination. The transmit management interface is coupled to the transmitter and analyzes data packets. The transmit management interface determines whether to transmit a data packet targeted to a particular destination or to block transmission of data packets to the particular destination by examining the transmit block status of the particular destination from the state table.

公开(公告)号：DE60139771D1

公开(公告)日：2009-10-15

申请号：DE60139771

申请日：2001-04-20

Applicant: ATHEROS COMM INC

Inventor： CHESSON GREGORY LAWRENCE

IPC: H04L12/56 ,  H04B7/005 ,  H04L1/18 ,  H04L12/28

公开(公告)号：AT441990T

公开(公告)日：2009-09-15

申请号：AT01927269

申请日：2001-04-20

Applicant: ATHEROS COMM INC

Inventor： CHESSON GREGORY

IPC: H04L12/56 ,  H04B7/005 ,  H04L1/18 ,  H04L12/28

公开(公告)号：AT422109T

公开(公告)日：2009-02-15

申请号：AT03736521

申请日：2003-04-29

Applicant: ATHEROS COMM INC

Inventor： JEN HUNG-MIN ,  SU DAVID

IPC: H03F3/45 ,  H03G1/00 ,  H03G3/28

Abstract: The present invention provides a variable gain amplifier with a plurality of gain stages in which each of the gain stages is implemented using a circuit that implements a neutralization approach. This variable gain amplifier provides stable operation characteristics as different gain stages within the variable gain amplifier are turned on and off. This variable gain amplifier also increases linearity across the entire operating range. Additionally, the variable gain amplifier of the present invention provides a constant input impedance through different gain settings. Further, the present invention provides a variable gain amplifier in which each of the various gain stages therein maximize the available voltage swing. Finally, this variable gain amplifier improves common-mode rejection performance and attenuates unwanted harmonics.