公开(公告)号：EP4369065A1

公开(公告)日：2024-05-15

申请号：EP23202872.0

申请日：2023-10-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： LEVY, Mark D. ,  ADUSUMILLI, Siva P. ,  BIAN, Yusheng

IPC: G02B6/122 ,  G02B6/13 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02B2006/1209720130101 ,  G02B6/122 ,  G02B6/131 ,  G02B6/136

Abstract: Structures for a waveguide and methods of forming a waveguide. The structure comprises a substrate (10), a waveguide core (33) comprising a compound semiconductor material, and a layer (18) disposed on the substrate (10). The layer (18) comprises the compound semiconductor material, and the layer (18) includes a cavity (36) positioned beneath the waveguide core (33).

公开(公告)号：EP4354439A1

公开(公告)日：2024-04-17

申请号：EP23187993.3

申请日：2023-07-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Gopinath, Venkatesh P. ,  Parvarandeh, Pirooz

IPC: G11C11/54 ,  G06N3/065 ,  G06F7/544 ,  G11C7/10 ,  G11C7/12 ,  G11C13/00 ,  G11C27/02

CPC classification number: G11C7/1006 ,  G06F7/5443 ,  G06N3/065 ,  G11C11/54 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/003 ,  G11C13/004 ,  G11C7/12 ,  G11C7/1084 ,  G11C27/026 ,  G11C2213/7720130101 ,  G11C7/1039

Abstract: A structure for in-memory serial processing includes a memory bank array. Each bank includes memory elements, each including first and second programmable resistors having inputs connected to an input node and outputs connected to first and second bitlines. In each bank, first and second feedback buffers are connected to the first and second bitlines and first and second output nodes. First and second output nodes of banks in the same column are connected to the same first and second column interconnect lines. The initial bank in each row includes amplifiers connected between the input nodes and memory elements. Outputs of these amplifiers are also connected by row interconnect lines to memory elements in downstream banks in the same row. Optionally, voltage buffers are connected to row interconnect lines and integrated into at least some banks. The amplifiers, feedback buffers, and voltage buffers minimize local IR drops and thereby processing errors.

公开(公告)号：EP4340026A1

公开(公告)日：2024-03-20

申请号：EP23188284.6

申请日：2023-07-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： NATH, Anindya ,  LOISEAU, Alain F. ,  MITRA, Souvick

IPC: H01L27/02 ,  H01L27/12 ,  H01L29/87

Abstract: The present disclosure relates to a structure including a trigger element within a semiconductor-on-insulator (SOI) substrate, and a silicon controlled rectifier (SCR) under a buried insulator layer of the SOI substrate. The trigger element is between an anode and a cathode of the SCR.

公开(公告)号：EP4300590A1

公开(公告)日：2024-01-03

申请号：EP22198916.3

申请日：2022-09-30

Applicant: GlobalFoundries U.S. Inc.

Inventor： Jain, Vibhor ,  Raghunathan, Uppili S. ,  Liu, Qizhi ,  Ngu, Yves T. ,  Raman, Ajay ,  Krishnasamy, Rajendran ,  Joseph, Alvin J.

IPC: H01L29/732 ,  H01L21/331 ,  H01L29/08 ,  H01L29/06

Abstract: A structure comprising: a collector; a base over the collector; and an emitter over the base, the emitter comprising at least one stepped feature over the base.

公开(公告)号：EP4300148A1

公开(公告)日：2024-01-03

申请号：EP22204088.3

申请日：2022-10-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bian, Yusheng

IPC: G02B6/12 ,  G02B6/125 ,  G02B6/122

Abstract: A structure (10) comprising: a substrate (16); and an edge coupler including a first waveguide core (12) and a second waveguide core (26), the first waveguide core (12) positioned in a vertical direction between the second waveguide core (26) and the substrate 816), the first waveguide core (12) having a first longitudinal axis, the second waveguide core (26) having a second longitudinal axis, and the second longitudinal axis of the second waveguide core slanted at a first angle relative to the first longitudinal axis of the first waveguide core.

公开(公告)号：EP4297092A1

公开(公告)日：2023-12-27

申请号：EP22205695.4

申请日：2022-11-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： HAZBUN, RAMSEY M. ,  ELLIS-MONAGHAN, JOHN J. ,  KRISHNASAMY, RAJENDRAN ,  ADUSUMILLI, SIVA P.

IPC: H01L27/146 ,  H01L27/144 ,  H01L31/18 ,  H01L31/0352 ,  H01L31/028 ,  H01L31/105

Abstract: A structure (100) comprising a substrate (101) comprising a substrate base (102) and a substrate extension (104) grown on the substrate base; a photodiode (112) contacting the substrate base, wherein the substrate extension is adjacent the photodiode; an additional device (120) contacting the substrate extension; and a sidewall spacer (114, 116) between the photodiode and the substrate extension, wherein the additional device includes conductive elements (130, 132) within the substrate extension adjacent the sidewall spacer.

公开(公告)号：EP4297078A1

公开(公告)日：2023-12-27

申请号：EP22205243.3

申请日：2022-11-03

Applicant: GlobalFoundries U.S. Inc.

Inventor： He, Zhong-Xiang ,  Hazbun, Ramsey ,  Krishnasamy, Rajendran ,  Kantarovsky, Johnatan Avraham ,  Abou-Khalil, Michel ,  Rassel, Richard

IPC: H01L23/367 ,  H01L23/373 ,  H01L29/06 ,  H01L29/417 ,  H01L29/778

Abstract: A semiconductor device, comprising: a substrate; a semiconductor layer over the substrate; a device layer over the semiconductor layer, the device layer comprising a first ohmic contact and a second ohmic contact; and heat dissipating structures at least through the substrate and the semiconductor layer, wherein the heat dissipating structures are between the first ohmic contact and the second ohmic contact.

公开(公告)号：EP4290285A1

公开(公告)日：2023-12-13

申请号：EP22204103.0

申请日：2022-10-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Sporer, Ryan ,  Nummy, Karen ,  Donegan, Keith ,  Houghton, Thomas ,  Bian, Yusheng ,  Hirokawa, Takako ,  Giewont, Kenneth

IPC: G02B6/12

Abstract: An integrated circuit chip comprising: a substrate; an optical component above the substrate;
a first connection level above the substrate, the first connection level includes the optical component and a first cladding structure, wherein the optical component is covered by the first cladding structure; a second connection level on the first connection level; and a second cladding structure directly above the optical component, the second cladding structure having at least a section within the second connection level, the second cladding structure is on the first cladding structure.

公开(公告)号：EP4254476A2

公开(公告)日：2023-10-04

申请号：EP22200004.4

申请日：2022-10-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： RAGHUNATHAN, Uppili S. ,  JAIN, Vibhor ,  ADUSUMILLI, Siva P. ,  NGU, Yves T. ,  KANTAROVSKY, Johnatan A. ,  VENTRONE, Sebastian T.

IPC: H01L21/764 ,  H01L21/762 ,  H01L29/06

Abstract: A structure comprising a semiconductor substrate comprising a trap-rich region; at least one airgap structure within the semiconductor substrate; at least one deep trench isolation structure laterally surrounding the at least one airgap structure and extending into the semiconductor substrate; and a device over the at least one airgap structure.

公开(公告)号：EP4235799A1

公开(公告)日：2023-08-30

申请号：EP22201778.2

申请日：2022-10-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  PENG, Jianwei ,  JAIN, Vibhor

IPC: H01L29/66 ,  H01L29/735 ,  H01L29/737 ,  H01L29/73 ,  H01L29/10 ,  H01L29/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with self-aligned asymmetric spacer and methods of manufacture. The structure includes: a base formed on a semiconductor substrate; an asymmetrical spacer surrounding the base; an emitter on a first side of the base and separated from the base by the asymmetrical spacer; and a collector on a second side of the base and separated from the base by the asymmetrical spacer.