公开(公告)号：EP4250367A1

公开(公告)日：2023-09-27

申请号：EP22205711.9

申请日：2022-11-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： PENG, Jianwei ,  YU, Hong ,  GU, Man ,  KOZARSKY, Eric S.

IPC: H01L29/66 ,  H01L29/49 ,  H01L21/28

Abstract: A structure comprising, a channel region; a gate dielectric on the channel region; source and drain structures on opposite sides of the channel region; and a gate conductor on the gate dielectric, wherein the source and drain structures include source and drain silicides, respectively, wherein the gate conductor includes a gate conductor silicide, and wherein the gate conductor silicide is thicker than the source and drain silicides.

公开(公告)号：EP4156289A1

公开(公告)日：2023-03-29

申请号：EP22198490.9

申请日：2022-09-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  JAIN, Vibhor ,  HOLT, Judson R.

IPC: H01L29/737 ,  H01L21/331 ,  H01L29/08

Abstract: A structure comprises: a base region (140) comprising a base layer (105); a buffer layer (108a) positioned laterally immediately adjacent to the base layer; and a collector region (120) comprising a collector layer (109a) positioned laterally immediately adjacent to the buffer layer, wherein the base layer, the buffer layer, and the collector layer comprise different semiconductor materials with different bandgap sizes.

公开(公告)号：EP4465362A1

公开(公告)日：2024-11-20

申请号：EP24153816.4

申请日：2024-01-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  PRITCHARD, David C. ,  JAIN, Navneet K. ,  MAZZA, James P. ,  FEUILLETTE, Romain H. A.

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to nanosheet transistor structures with tunable channels and inner sidewall spacers and methods of manufacture. The structure includes: a plurality of stacked semiconductor nanosheets over a semiconductor substrate; a plurality of gate structures surrounding individual nanosheets of the plurality of semiconductor nanosheets, with a lower gate structure comprising a length at least equal to a length of each remaining gate structure of the plurality of gate structures; an inner sidewall spacer adjacent each of the plurality of gate structures; and source/drain regions on opposing sides of the plurality of gate structures, separated therefrom by the inner sidewall spacer.

公开(公告)号：EP4373237A1

公开(公告)日：2024-05-22

申请号：EP23198101.0

申请日：2023-09-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： DERRICKSON, Alexander ,  GOPINATH, Venkatesh ,  PEKARIK, John J. ,  YU, Hong ,  JAIN, Vibhor ,  PRITCHARD, David

IPC: H10B63/00 ,  H01L27/102 ,  H10B61/00 ,  H10N70/20 ,  H10N70/00

CPC classification number: H10B63/32 ,  H10B61/20 ,  H10B63/80 ,  H10N70/20 ,  H10N70/826 ,  H10N70/883 ,  H10N70/8833 ,  H01L27/1022

Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate (32), and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor (12) including a first collector in the substrate (34), a first emitter (40), and a first base layer (20). The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor (14) including a second collector (34) in the substrate, a second emitter (42), and a second base layer (22). The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.

公开(公告)号：EP4373236A1

公开(公告)日：2024-05-22

申请号：EP23197829.7

申请日：2023-09-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： PEKARIK, John J. ,  YU, Hong ,  JAIN, Vibhor ,  DERRICKSON, Alexander ,  GOPINATH, Venkatesh

IPC: H10B63/00 ,  H01L27/102 ,  H10B61/00 ,  H10N70/20 ,  H10N70/00

CPC classification number: H10B63/32 ,  H10N70/826 ,  H10B61/20 ,  H10B63/80 ,  H10N70/20 ,  H10N70/883 ,  H10N70/8833 ,  H01L27/1022

Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure (10) comprises a substrate (32) having a top surface, a trench isolation region (24) in the substrate, and a base layer (20) on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor (12) includes a first collector (34) in the substrate and a first emitter (40) on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor (16) includes a second collector (36) in the substrate and a second emitter (44) on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.

公开(公告)号：EP4235799A1

公开(公告)日：2023-08-30

申请号：EP22201778.2

申请日：2022-10-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  PENG, Jianwei ,  JAIN, Vibhor

IPC: H01L29/66 ,  H01L29/735 ,  H01L29/737 ,  H01L29/73 ,  H01L29/10 ,  H01L29/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with self-aligned asymmetric spacer and methods of manufacture. The structure includes: a base formed on a semiconductor substrate; an asymmetrical spacer surrounding the base; an emitter on a first side of the base and separated from the base by the asymmetrical spacer; and a collector on a second side of the base and separated from the base by the asymmetrical spacer.

公开(公告)号：EP4160695A1

公开(公告)日：2023-04-05

申请号：EP22198237.4

申请日：2022-09-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  HOLT, Judson R. ,  DERRICKSON, Alexander M.

IPC: H01L29/735 ,  H01L21/331 ,  H01L29/165 ,  H01L29/06 ,  H01L27/07 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10

Abstract: Embodiments of the disclosure provide a bipolar transistor structure on a semiconductor fin. The semiconductor fin may be on a substrate and may have a first doping type, a length in a first direction, and a width in a second direction perpendicular to the first direction. The semiconductor fin includes a first portion and a second portion adjacent the first portion along the length of the semiconductor fin. The second portion is coupled to a base contact. A dopant concentration of the first portion is less than a dopant concentration of the second portion. An emitter/collector (E/C) material is adjacent the first portion along the width of the semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.