SYSTEM AND METHOD FOR HANDLING REGISTER DEPENDENCY IN PIPELINE PROCESSOR BASED ON STACK

    公开(公告)号:JP2001356905A

    公开(公告)日:2001-12-26

    申请号:JP2001130880

    申请日:2001-04-27

    Abstract: PROBLEM TO BE SOLVED: To provide a pipeline processor based on a register stack capable of handling data dependency without causing sacrifice on performance. SOLUTION: This data processor is provided with the register stack having plural registers for architecture to store operands to be required by instructions to be executed by the data processor. An instruction execution pipeline having N processing stages is further included and each processing stage executes one of plural execution steps related to pending instructions under execution by the instruction execution pipeline. At least one mapping register related to at least one of the N processing stages is further arranged and stores mapping data which can be used to determine a physical register in relation to a stack register for architecture accessed by the pending instruction.

    NARROW ARRAY CAPACITIVE FINGERPRINT IMAGE PICKUP DEVICE

    公开(公告)号:JP2001307078A

    公开(公告)日:2001-11-02

    申请号:JP2001091575

    申请日:2001-03-28

    Abstract: PROBLEM TO BE SOLVED: To provide a small-sized and inexpensive fingerprint sensor. SOLUTION: This fingerprint sensing system is provided with an array composed of capacitive sensing elements and the array is provided with a first dimension which is almost the width of a fingerprint and a second dimension shorter than the length of the fingerprint. A scanning control unit is connected so as to scan the array at a scanning speed decided by the moving speed of a finger on the array and the scanning control unit scans the array and captures a partial fingerprint image. Output logic is connected to the array so as to assemble the captured fingerprint image to a complete fingerprint image based on the moving direction of the finger on the array. A mouse device is positioned adjacently to the array within the moving route of the finger on the array.

    CIRCUIT AND METHOD FOR CONTROLLING GAIN OF AMPLIFIER

    公开(公告)号:JP2001283527A

    公开(公告)日:2001-10-12

    申请号:JP2001036348

    申请日:2001-02-14

    Inventor: OZDEMIR HAKAN

    Abstract: PROBLEM TO BE SOLVED: To increase the storage capacity of a recording medium by making preambles used on the recording medium short. SOLUTION: The circuit which controls the gain of an amplifier amplifying an information signal has two buffers for storing two samples of the amplified information signal and also has a gain determining circuit coupled with the buffers. This gain determining circuit generates gain control for shifting the amplitude of the information signal amplified by the amplifier according to the two samples to or toward a specific amplitude. This circuit is able to give initial rough gain control to a read signal amplifier for a disk drive read channel. This initial control accelerates the more speedy stabilization of the amplifier gain in the beginning of a data sector and the speeded-up stabilization allows the data sector to have a shorter preamble, so that a disk can have higher data storage density.

    TRANSFORMER LINE DRIVER WITH CONTROLLED IMPEDANCE

    公开(公告)号:JP2001257728A

    公开(公告)日:2001-09-21

    申请号:JP2001027952

    申请日:2001-02-05

    Inventor: ZABRODA OLEKSIY

    Abstract: PROBLEM TO BE SOLVED: To provide a push-pull type transformer line driver that can reduce power dissipation and enhance the power efficiency. SOLUTION: A pair of buffers are connected to a primary coil of a transformer in a push-pull configuration, and a couple of pre-drivers are connected to the pair of the buffers. Each buffer receives a flyback compensation signal generated from the other of the pre-drivers and the buffer using the flyback compensation signal is in operation to cancel a flyback voltage effect induced in the buffer by a line driver signal applied to the primary coil.

    METHOD AND DEVICE FOR PROCESSING PICTURE

    公开(公告)号:JP2001238073A

    公开(公告)日:2001-08-31

    申请号:JP2000400682

    申请日:2000-12-28

    Inventor: DUBE SIMANT HONG LI

    Abstract: PROBLEM TO BE SOLVED: To provide a technique for processing a picture by adaptively selecting a linear interpolation and a nonlinear interpolation. SOLUTION: The picture contents of a part of the image are sorted and in response to it, selection is carried out between a linear interpolation and a nonlinear interpolation for interpolating a data point to the part of the picture. In a part where the contact of the picture does not have an identified edge and in a part including an edge identified by being connected with an identified edge direction or a path of equal luminance, linear interpolation is used.

    METHOD AND SYSTEM FOR PROCESSING IMAGE IN IMAGE COMPRESSION/EXPANSION SYSTEM EMPLOYING HIERARCHICAL CODING

    公开(公告)号:JP2001197507A

    公开(公告)日:2001-07-19

    申请号:JP2000400108

    申请日:2000-12-28

    Inventor: DUBE SIMANT HONG LI

    Abstract: PROBLEM TO BE SOLVED: To provide a method and system for image processing in an image compression expansion system employing hierarchical coding. SOLUTION: This invention produces a plurality of predictors with respect to an object pixel by using a plurality of predictors and generates a plurality of predictors with respect to at least one pixel denoting a causal context. This invention de at least one measure of a correlation between a plurality of predictors with respect to at least one pixel and data denoting the causal context, and also gives a predictor to an object pixel calculated as a weighted sum according to the measure of at least one correlation and a weighting policy.

    DEVICE AND METHOD FOR DECODING DIGITAL DATA

    公开(公告)号:JP2001196938A

    公开(公告)日:2001-07-19

    申请号:JP2000351419

    申请日:2000-11-17

    Abstract: PROBLEM TO BE SOLVED: To provide an enhanced decoder circuit that decodes a Reed Solomon code or a BCH code. SOLUTION: This invention provides the decoder where a step of solving an error locator polynomial is conducted at the same time for a step of calculating an error pattern, and especially executes the Chein search to decide the error locator polynomial with respect to a received code word and the Forney algorithm to calculate the error pattern at the same time.

    INTEGRATED CIRCUIT HAVING ADDITIONAL PORT

    公开(公告)号:JP2001168917A

    公开(公告)日:2001-06-22

    申请号:JP2000301580

    申请日:2000-10-02

    Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit that is provided with a packet router, whose extension is facilitated. SOLUTION: This invention provides the integrated circuit that is provided with a packet router where function modules are connected by respective ports. One of the ports acts like a socket port with respect to an extension socket. The extension socket provides a plurality of additional extension ports, to which additional function modules can be connected. All of the ports, including the extension socket port and connected to the packet router, preferably exist in a common address space of the integrated circuit.

    METHOD AND CIRCUIT FOR DECIDING SIGNAL AMPLITUDE

    公开(公告)号:JP2001160755A

    公开(公告)日:2001-06-12

    申请号:JP2000307612

    申请日:2000-10-06

    Inventor: MCCALL KEVIN J

    Abstract: PROBLEM TO BE SOLVED: To provide a technique for quickly deciding the amplitude of input signals. SOLUTION: Two squared samples are generated by squaring the two samples of the input signals and the difference of the square is generated by subtracting the squared one of a prescribed amplitude from the sum of the two squared samples. A shifting operation is performed to the difference of the square and the difference between an actual amplitude and the prescribed amplitude is decided.

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