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公开(公告)号：KR1019950001507B1
公开(公告)日：1995-02-25
申请号：KR1019910026089
申请日：1991-12-30
IPC: H04J3/07
Abstract: The mapper multiplies/demultiplies 3 VC12 (Virtual Container 12) signals to TUG21 (Tributary Unit Group 21) signals after mapping the CEPT (Conference of European and Telegram) DS1 dependant signals to the VC12 signals in the synchronous transmission system. The mapper includes an HDB3 (High Density Bipolar 3) decoder (1) converting the CEPT DS1 signal to NRZ (Non-Return to Zero) signal, a C12 mapper (3) converting the NRZ signal to the C12 signal, and a VC12 mapper (4) inserting the V5 pass overhead data into the C12 signal and generating the VC12 signal by inserting the stuffing control signals (C1,C2) and stuff bits (S1,C2).
Abstract translation: 映射器将CEPT（欧洲和电报会议）DS1相关信号映射到同步传输系统中的VC12信号之后，将3 VC12（虚拟容器12）信号乘以TUG21（支路单元组21）信号。 映射器包括将CEPT DS1信号转换为NRZ（非归零）信号的HDB3（高密度双极3）解码器（1），将NRZ信号转换为C12信号的C12映射器（3）和VC12映射器 （4）将V5通过开销数据插入到C12信号中，并通过插入填充控制信号（C1，C2）和填充比特（S1，C2）来生成VC12信号。
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公开(公告)号：KR1019940009768B1
公开(公告)日：1994-10-17
申请号：KR1019910023155
申请日：1991-12-17
IPC: H04J3/14
Abstract: The circuit provides an AUG signal loop interrupt monitoring circuit for monitoring AUG signal interface to form the STM-1 signal. The circuit comprises AUG MUX pass ID insertion block (1) for inserting the specific pattern in the AUG signal corresponding to 9 byte position allocated as overhead, an STM-1 MUX pass ID detector (3) for monitoring that the specific pattern is received normally, an STM-1 DEMUX pass ID insertion block (4) for receiving the STM-1 signal and processing the overhead, an AUG DEMUX pass ID detector (2) for monitoring its process and interrupting CPU.
Abstract translation: 该电路提供AUG信号环路中断监视电路，用于监视AUG信号接口，形成STM-1信号。 该电路包括用于将特定模式插入对应于作为开销分配的9字节位置的AUG信号的AUG MUX通行ID插入块（1），用于监视特定模式被正常接收的STM-1 MUX通过ID检测器（3） 用于接收STM-1信号并处理开销的STM-1 DEMUX通过ID插入块（4），用于监视其进程并中断CPU的AUG DEMUX通过ID检测器（2）。
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公开(公告)号：KR1019940008149B1
公开(公告)日：1994-09-03
申请号：KR1019910024254
申请日：1991-12-24
Applicant: 한국전자통신연구원
IPC: G11C11/40
Abstract: A sense amplifier circuit of a DRAM array includes: first and second current varied transistors turned on/off by a pair of bit lines; first and second transfer transistors turned on/off by a column decoder; an equalizing transistor for equalizing a voltage level of first and second output nodes connected to first and second input terminals of a main amplifier; first and second switching transistors for electrically connecting or cutting off the first and second output nodes and the main amplifier; and a delay circuit for delaying output signals of the column decoder, thereby obtaining high sensing operation speed.
Abstract translation: DRAM阵列的读出放大器电路包括：第一和第二电流变化的晶体管被一对位线导通/截止; 第一和第二传输晶体管由列解码器导通/关断; 均衡晶体管，用于均衡连接到主放大器的第一和第二输入端的第一和第二输出节点的电压电平; 用于电连接或切断第一和第二输出节点和主放大器的第一和第二开关晶体管; 以及用于延迟列解码器的输出信号的延迟电路，从而获得高感测操作速度。
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公开(公告)号：KR1019940000149B1
公开(公告)日：1994-01-07
申请号：KR1019900018074
申请日：1990-11-09
Applicant: 한국전자통신연구원
IPC: G11C11/409
Abstract: The device includes three NMOS transistors (MN1,MN2,MN3) and two PMOS transistors (MP6,MP7), a 1st amplifying means for amplifying the difference voltage of a nodes (1)(2) by the 1st sensing signal (PSN1) of the low edge, a 2nd amplifying means for amplifying the difference voltage of the two nodes(1)(2) by the 2nd sensing signal (PSP1) of the low edge, a 3rd amplifying means for amplifying the difference voltage of two nodes (4)(5) by the 3rd sensing signal (PSN2) of the low edge, a 4th amplifying means for amplifying the difference voltage of the two nodes(4)(5) by the 4th sensing signal (PSP2) of the low edge, This method improves the sensitivity of the differential amplifier and, the sensing speed is within the 3nd.
Abstract translation: 该装置包括三个NMOS晶体管（MN1，MN2，MN3）和两个PMOS晶体管（MP6，MP7），第一放大装置，用于通过第一感测信号（PSN1）放大节点（1）（2）的差分电压 低边缘，用于通过低边缘的第二感测信号（PSP1）放大两个节点（1）（2）的差分电压的第二放大装置，用于放大两个节点（4）的差分电压的第三放大装置 ）（5）通过低边缘的第三感测信号（PSN2），第四放大装置，用于通过低边缘的第四感测信号（PSP2）放大两个节点（4）（5）的差分电压。 方法提高了差分放大器的灵敏度，感测速度在3号以内。
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Patent Agency Ranking
公开(公告)号：KR1019930010985B1
公开(公告)日：1993-11-18
申请号：KR1019900021831
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L21/70
Abstract: The isolation using various local poly oxides is prepared by: depositing 10-100 nm thick oxide film (12) on a substrate (11); depositing 50-200 nm thick 1st polysilicon layer (13); depositing 100-200 m thick nitride film (14); forming a photosensitive film (15); forming nitride film pattern by photoresist process; implanting channel-stopping impurities (IE13-IE15), depositing and oxidizing 2nd polysilicon film (16) to form poly oxide film (17); etch-backing the poly oxide film to the part of nitride film (14); removing the nitride film (14) and 1st polysilicon oxide film (12) in order to form oxide (19) for device isolation.
Abstract translation: 使用各种局部多氧化物的隔离是通过：在衬底（11）上沉积10-100nm厚的氧化膜（12）; 沉积50-200nm厚的第一多晶硅层（13）; 沉积100-200μm厚的氮化物膜（14）; 形成感光膜（15）; 通过光刻胶工艺形成氮化物膜图案; 注入通道停止杂质（IE13-IE15），沉积和氧化第二多晶硅膜（16）以形成多晶氧化膜（17）; 将多晶氧化物膜蚀刻到氮化物膜（14）的一部分上; 去除氮化物膜（14）和第一多晶硅氧化膜（12）以形成用于器件隔离的氧化物（19）。
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公开(公告)号：KR1019930015427A
公开(公告)日：1993-07-24
申请号：KR1019910023155
申请日：1991-12-17
IPC: H04J3/14
Abstract: 본 발명은 SDH(Synchronous Digital Hierachy) 기본계위인 STM-1(Synchronous Transport Module 1)신호를 형성하기 위한 AUG(Administration Unit Group) 신호의 인터페이스를 감시하기 위한 AUG 신호 루프장애 감시회로에 관한 것이다.
따라서, 본 발명은 AUG MUX 패스 ID 삽입수단(1), STM-1 MUX 패스 ID 검출수단(3) STM-1 DEMUX 패스 ID 삽입수단(4), AUG DEMUX 패스 ID 검출수단(2)으로 구성되는 것을 특징으로 한다.-
98.发明授权이더넷에 기반을 둔 패킷 전달 계층 방식의 수동형 광 네트워크를 제공하는 커넥션 관리 서버, ＯＬＴ, ＯＮＵ/ＯＮＴ 및 그 제공 방법과 시스템 有权/连接管理服务器OLT ONU / ONT以及用于提供基于以太网的PTL-PON的系统和方法
公开(公告)号：KR101711661B1
公开(公告)日：2017-03-13
申请号：KR1020100134065
申请日：2010-12-23
Applicant: 한국전자통신연구원
CPC classification number: H04L12/2861 , H04Q11/0067 , H04Q2011/0079
Abstract: 본발명은일방의가입자종단의 ONU/ONT와타방의가입자종단의 ONU/ONT 간에 PTL 커넥션을설정하고, ONU/ONT와 OLT 간의 PON 구간에는 PTL-PON 방식을적용하여, 망전체적으로단일화된 PTL 커넥션을관리하는커넥션관리서버; 수신되는패킷의커넥션을관리하며상기패킷의전송방향에따라포맷변환하여전송하는 OLT; 및상기 PTL 커넥션의앤드포인트(End Point)가되어, 수신되는패킷의전송방향에따라패킷을포맷변환하여가입자단말또는상기 OLT에전송하는 ONU/ONT를포함하는이더넷에기반을둔 패킷전달계층 (PTL) 방식의수동형광 네트워크 (PON) 제공시스템을제공하여, 가입자종단의 ONU/ONT까지 PTL 방식이확장되고, 메트로망, 코어망, 액세스망, 전체가하나의커넥션으로관리됨으로써, 고신뢰의패킷정보를가입자종단까지전달하는효과를제공한다.
Abstract translation: 提供了一种基于以太网的分组传输层（PTL）方案的无源光网络（PON）提供系统，包括：连接管理服务器，通过在光网络单元之间建立PTL连接来管理整个网络上的统一PTL连接 （ONU）/光网络终端（ONT）和另一方的客户端接的ONU / ONT，并且通过将PTL-PON方案应用于ONU / ONT与光端机之间的PON部分 线路终端（OLT）; OLT管理接收到的分组的连接，并根据分组的传输方向转换分组的格式，从而发送分组; 并且ONU / ONT成为PTL连接的终点，以根据接收到的分组的传输方向转换分组的格式，从而将分组发送到客户终端或OLT。
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公开(公告)号：KR1020140076950A
公开(公告)日：2014-06-23
申请号：KR1020120145559
申请日：2012-12-13
Applicant: 한국전자통신연구원
CPC classification number: H04J14/0212 , H04J14/0221 , H04J14/0227
Abstract: The present invention relates to a method for expanding an optical layer degree in optical-circuit-packet transport equipment and an apparatus thereof. The apparatus for expanding an optical layer degree in optical-circuit-packet transport equipment according to one embodiment of the present invention includes a wavelength switch and a wavelength division multiplexing (WDM) part. According to one embodiment of the present invention, the wavelength switch transmits a wavelength division multiplexing (WDM) signal to a first port and a second port.
Abstract translation: 本发明涉及一种用于扩展光电路分组传输设备中的光学层度的方法及其装置。 根据本发明的一个实施例的用于扩展光电路分组传送设备中的光层度的装置包括波长切换和波分复用（WDM）部分。 根据本发明的一个实施例，波长切换将波分复用（WDM）信号发送到第一端口和第二端口。
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公开(公告)号：KR101252826B1
公开(公告)日：2013-04-11
申请号：KR1020090037575
申请日：2009-04-29
Applicant: 한국전자통신연구원
Abstract: 본 발명은 광트랜스폰더가 필요없는 패킷-광 통합스위치에 관한 것으로, 이더넷의 패킷신호를 기설정된 출력포트로 출력하는 패킷 라인 카드(100); 상기 패킷 라인 카드(100)로부터의 패킷 신호를 상기 패킷 신호에 포함된 목적지 주소에 기설정된 출력 포트로 전달하는 패킷 스위치 패브릭(200); 상기 패킷 스위치 패브릭(200)으로부터의 패킷 신호를 기설정된 파장을 갖는 OTU2 광신호로 변환하는 10GbE/OTU2 통합 라인 카드(300); 및 상기 10GbE/OTU2 통합 라인 카드(13)로부터의 광신호를 기설정된 파장별로 기설정된 WDM 포트에 할당하여, 상기 광신호를 파장별로 각 포트로 교환하는 파장선택 스위치 패브릭(400)을 포함하고,
전술한 본 발명의 광트랜스폰더가 필요없는 패킷-광 통합스위치에서는, 상기 패킷 라인 카드(100), 패킷 스위치 패브릭(200), 10GbE/OTU2 통합 라인 카드(300) 및 파장선택 스위치 패브릭(400) 각각은 상기 동작의 역과정을 수행한다.
10GbE, XSBI, OTU2, SFI-4, 패킷 스위치, 광 스위치, 통합 스위치
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