Abstract:
The mapper multiplies/demultiplies 3 VC12 (Virtual Container 12) signals to TUG21 (Tributary Unit Group 21) signals after mapping the CEPT (Conference of European and Telegram) DS1 dependant signals to the VC12 signals in the synchronous transmission system. The mapper includes an HDB3 (High Density Bipolar 3) decoder (1) converting the CEPT DS1 signal to NRZ (Non-Return to Zero) signal, a C12 mapper (3) converting the NRZ signal to the C12 signal, and a VC12 mapper (4) inserting the V5 pass overhead data into the C12 signal and generating the VC12 signal by inserting the stuffing control signals (C1,C2) and stuff bits (S1,C2).
Abstract:
The circuit provides an AUG signal loop interrupt monitoring circuit for monitoring AUG signal interface to form the STM-1 signal. The circuit comprises AUG MUX pass ID insertion block (1) for inserting the specific pattern in the AUG signal corresponding to 9 byte position allocated as overhead, an STM-1 MUX pass ID detector (3) for monitoring that the specific pattern is received normally, an STM-1 DEMUX pass ID insertion block (4) for receiving the STM-1 signal and processing the overhead, an AUG DEMUX pass ID detector (2) for monitoring its process and interrupting CPU.
Abstract:
A sense amplifier circuit of a DRAM array includes: first and second current varied transistors turned on/off by a pair of bit lines; first and second transfer transistors turned on/off by a column decoder; an equalizing transistor for equalizing a voltage level of first and second output nodes connected to first and second input terminals of a main amplifier; first and second switching transistors for electrically connecting or cutting off the first and second output nodes and the main amplifier; and a delay circuit for delaying output signals of the column decoder, thereby obtaining high sensing operation speed.
Abstract:
The device includes three NMOS transistors (MN1,MN2,MN3) and two PMOS transistors (MP6,MP7), a 1st amplifying means for amplifying the difference voltage of a nodes (1)(2) by the 1st sensing signal (PSN1) of the low edge, a 2nd amplifying means for amplifying the difference voltage of the two nodes(1)(2) by the 2nd sensing signal (PSP1) of the low edge, a 3rd amplifying means for amplifying the difference voltage of two nodes (4)(5) by the 3rd sensing signal (PSN2) of the low edge, a 4th amplifying means for amplifying the difference voltage of the two nodes(4)(5) by the 4th sensing signal (PSP2) of the low edge, This method improves the sensitivity of the differential amplifier and, the sensing speed is within the 3nd.
Abstract:
The isolation using various local poly oxides is prepared by: depositing 10-100 nm thick oxide film (12) on a substrate (11); depositing 50-200 nm thick 1st polysilicon layer (13); depositing 100-200 m thick nitride film (14); forming a photosensitive film (15); forming nitride film pattern by photoresist process; implanting channel-stopping impurities (IE13-IE15), depositing and oxidizing 2nd polysilicon film (16) to form poly oxide film (17); etch-backing the poly oxide film to the part of nitride film (14); removing the nitride film (14) and 1st polysilicon oxide film (12) in order to form oxide (19) for device isolation.
Abstract:
본 발명은 SDH(Synchronous Digital Hierachy) 기본계위인 STM-1(Synchronous Transport Module 1)신호를 형성하기 위한 AUG(Administration Unit Group) 신호의 인터페이스를 감시하기 위한 AUG 신호 루프장애 감시회로에 관한 것이다. 따라서, 본 발명은 AUG MUX 패스 ID 삽입수단(1), STM-1 MUX 패스 ID 검출수단(3) STM-1 DEMUX 패스 ID 삽입수단(4), AUG DEMUX 패스 ID 검출수단(2)으로 구성되는 것을 특징으로 한다.
Abstract:
The present invention relates to a method for expanding an optical layer degree in optical-circuit-packet transport equipment and an apparatus thereof. The apparatus for expanding an optical layer degree in optical-circuit-packet transport equipment according to one embodiment of the present invention includes a wavelength switch and a wavelength division multiplexing (WDM) part. According to one embodiment of the present invention, the wavelength switch transmits a wavelength division multiplexing (WDM) signal to a first port and a second port.
Abstract:
본 발명은 광트랜스폰더가 필요없는 패킷-광 통합스위치에 관한 것으로, 이더넷의 패킷신호를 기설정된 출력포트로 출력하는 패킷 라인 카드(100); 상기 패킷 라인 카드(100)로부터의 패킷 신호를 상기 패킷 신호에 포함된 목적지 주소에 기설정된 출력 포트로 전달하는 패킷 스위치 패브릭(200); 상기 패킷 스위치 패브릭(200)으로부터의 패킷 신호를 기설정된 파장을 갖는 OTU2 광신호로 변환하는 10GbE/OTU2 통합 라인 카드(300); 및 상기 10GbE/OTU2 통합 라인 카드(13)로부터의 광신호를 기설정된 파장별로 기설정된 WDM 포트에 할당하여, 상기 광신호를 파장별로 각 포트로 교환하는 파장선택 스위치 패브릭(400)을 포함하고, 전술한 본 발명의 광트랜스폰더가 필요없는 패킷-광 통합스위치에서는, 상기 패킷 라인 카드(100), 패킷 스위치 패브릭(200), 10GbE/OTU2 통합 라인 카드(300) 및 파장선택 스위치 패브릭(400) 각각은 상기 동작의 역과정을 수행한다. 10GbE, XSBI, OTU2, SFI-4, 패킷 스위치, 광 스위치, 통합 스위치