中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

414 records (took 0.032 seconds)

    DIAMOND N-TYPE SEMICONDUCTOR, METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR DEVICE, AND ELECTRON EMITTING DEVICE
    97.
    发明申请
    DIAMOND N-TYPE SEMICONDUCTOR, METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR DEVICE, AND ELECTRON EMITTING DEVICE 审中-公开
    金刚石N型半导体，其制造方法，半导体器件和电子发射器件

    公开(公告)号：US20120175641A1

    公开(公告)日：2012-07-12

    申请号：US13426375

    申请日：2012-03-21

    Applicant: Akihiko NAMBA ,  Yoshiki NISHIBAYASHI ,  Takahiro IMAI

    Inventor： Akihiko NAMBA ,  Yoshiki NISHIBAYASHI ,  Takahiro IMAI

    IPC: H01L29/16 ,  H01L21/205

    CPC classification number: H01L29/1602 ,  H01J1/308

    Abstract: The present invention relates to a diamond n-type semiconductor in which the amount of change in carrier concentration is fully reduced in a wide temperature range. The diamond n-type semiconductor comprises a diamond substrate, and a diamond semiconductor formed on a main surface thereof and turned out to be n-type. The diamond semiconductor exhibits a carrier concentration (electron concentration) negatively correlated with temperature in a part of a temperature region in which it is turned out to be n-type, and a Hall coefficient positively correlated with temperature. The diamond n-type semiconductor having such a characteristic is obtained, for example, by forming a diamond semiconductor doped with a large amount of a donor element while introducing an impurity other than the donor element onto the diamond substrate.

    Abstract translation: 本发明涉及一种金刚石n型半导体，其中载体浓度的变化量在宽的温度范围内完全降低。 金刚石n型半导体包括金刚石基板和形成在其主表面上的金刚石半导体，并被证明为n型。 金刚石半导体表现出在其中显示为n型的温度区域的一部分中的载流子浓度（电子浓度）与温度负相关，并且霍尔系数与温度呈正相关。 具有这种特性的金刚石n型半导体例如通过形成掺杂有大量施主元素的金刚石半导体，同时将施主元素以外的杂质引入到金刚石基板上而获得。

    Display device, flat lamp and method of fabricating the display device and flat lamp
    98.
    发明申请
    Display device, flat lamp and method of fabricating the display device and flat lamp 失效
    显示装置，平板灯和制造显示装置和平板灯的方法

    公开(公告)号：US20070117251A1

    公开(公告)日：2007-05-24

    申请号：US11601690

    申请日：2006-11-20

    Applicant: Hyoung-Bin Park ,  Seung-Hyun Son ,  Sang-Hun Jang ,  Gi-Young Kim ,  Sung-Soo Kim ,  Ho-Nyeon Lee

    Inventor： Hyoung-Bin Park ,  Seung-Hyun Son ,  Sang-Hun Jang ,  Gi-Young Kim ,  Sung-Soo Kim ,  Ho-Nyeon Lee

    IPC: H01L21/00

    CPC classification number: H01J61/305 ,  B82Y10/00 ,  H01J1/308 ,  H01J1/312 ,  H01J17/066 ,  H01J17/492

    Abstract: A display device and a flat lamp that have simple structures and can be fabricated using simple fabricating processes, and a method of fabricating the display device and the flat lamp. The display device includes: a first substrate and a second substrate facing each other across a predetermined distance; barrier ribs defining light emitting cells with the first substrate and the second substrate; an anode electrode disposed in the light emitting cell; a conductive silicon layer disposed on an inner surface of one of the first and second substrates; an oxidized porous silicon layer, at least a part of which is disposed on the conductive silicon layer; and a gas contained in the light emitting cell. The fabrication method includes doping part of a silicon layer on the inner surface of the first or second substrate and changing another part of the silicon layer to an oxidized porous silicon layer.

    Abstract translation: 具有简单结构并且可以使用简单的制造工艺制造的显示装置和平板灯，以及制造显示装置和平板灯的方法。 显示装置包括：第一基板和第二基板，其彼此面对预定距离; 用第一基板和第二基板限定发光单元的阻挡肋; 设置在所述发光单元中的阳极; 设置在第一和第二基板中的一个的内表面上的导电硅层; 氧化多孔硅层，其至少一部分设置在导电硅层上; 以及包含在发光单元中的气体。 制造方法包括在第一或第二衬底的内表面上掺杂硅层的一部分，并将硅层的另一部分改变为氧化的多孔硅层。

    Electron device and junction transistor
    99.
    发明授权
    Electron device and junction transistor 失效

    公开(公告)号：US06566692B2

    公开(公告)日：2003-05-20

    申请号：US09924920

    申请日：2001-08-08

    Applicant: Takeshi Uenoyama ,  Masahiro Deguchi

    Inventor： Takeshi Uenoyama ,  Masahiro Deguchi

    IPC: H01L31072

    CPC classification number: H01J1/308

    Abstract: An n-GaN layer is provided as an emitter layer for supplying electrons. A non-doped (intrinsic) AlxGa1−xN layer (0≦x≦1) having a compositionally graded Al content ratio x is provided as an electron transfer layer for transferring electrons toward the surface. A non-doped AlN layer having a negative electron affinity (NEA) is provided as a surface layer. Above the AlN layer, a control electrode and a collecting electrode are provided. An insulating layer formed of a material having a larger electron affinity than that of the AlN layer is interposed between the control electrode and the collecting electrode. This provides a junction transistor which allows electrons injected from the AlN layer to conduct through the conduction band of the insulating layer and then reach the collecting electrode.

    INJECTION COLD EMITTER WITH NEGATIVE ELECTRON AFFINITY BASED ON WIDE-GAP SEMICONDUCTOR STRUCTURE WITH CONTROLLING BASE
    100.
    发明申请
    INJECTION COLD EMITTER WITH NEGATIVE ELECTRON AFFINITY BASED ON WIDE-GAP SEMICONDUCTOR STRUCTURE WITH CONTROLLING BASE 失效
    基于具有控制基的宽带半导体结构的负电子感应器的注射冷启动器

    公开(公告)号：US20030071554A1

    公开(公告)日：2003-04-17

    申请号：US09974818

    申请日：2001-10-12

    Inventor： Viatcheslav V. Ossipov ,  Alexandre M. Bratkovski ,  Henryk Birecki

    IPC: H01J001/00

    CPC classification number: H01J1/308

    Abstract: A cold electron emitter may include a heavily nnull doped wide band gap (WBG) substrate, a p-doped WBG region, and a low work function metallic layer (nnull-p-M structure). A modification of this structure includes heavily pnull doped region between p region and M metallic layer (nnull-p-pnull-M structure). These structures make it possible to combine high current emission with stable (durable) operation. The high current density is possible because the p-doped (or pnull heavily doped) WBG region acts as a negative electron affinity material when in contact with low work function metals. The injection emitters with the nnull-p-M and nnull-p-pnull-M structures are stable since the emitters make use of relatively low extracting electric field and are not affected by contamination and/or absorption from accelerated ions. In addition, the structures may be fabricated with current state-of-the-art technology.

    Abstract translation: 冷电子发射器可以包括重n +掺杂宽带隙（WBG）衬底，p掺杂WBG区和低功函数金属层（n + -p-M结构）。 该结构的修改包括p区和M金属层（n + -p-p + -M结构）之间的重p +掺杂区。 这些结构使得可以将高电流发射与稳定（耐用）操作相结合。 高电流密度是可能的，因为当与低功函数金属接触时，p掺杂（或p +重掺杂）WBG区域充当负电子亲和材料。 具有n + -p-M和n + -p-p + -M结构的注入发射体是稳定的，因为发射体使用相对低的提取电场，并且不受来自加速离子的污染和/或吸收的影响。 此外，结构可以用当前最先进的技术制造。

Patent Agency Ranking