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公开(公告)号:JPH0269957A
公开(公告)日:1990-03-08
申请号:JP22127088
申请日:1988-09-06
Applicant: CANON KK
Inventor: CHIBA YUJI , FUJIOKA HIDEHIKO , MIZUSAWA NOBUTOSHI , KARIYA TAKUO , SHIMODA ISAMU
IPC: B65G1/07 , B65G1/00 , G03F7/20 , H01L21/027 , H01L21/30 , H01L21/673
Abstract: PURPOSE:To shut off the atmosphere, and to prevent dusts from being introduced thereinto by composing a cassette for holding a plurality of X-ray masks to be used for a semiconductor manufacturing apparatus of a body for simultaneously containing and holding the cassettes, a sealed cover, and a locking mechanism for connecting them. CONSTITUTION:A plurality of mask stages MS are radially disposed around a central shaft to contain X-ray masks XM, and the upper face is covered with the cover CH of a cassette body. Then, the body is inserted into a cylindrical cover CC in which seals S1, S2 are provided at the upper and lower ends and a valve CV is attached to the lower end, the whole body is sealed, nonactive gas is press-fitted from a valve CV to maintain the inner pressure higher than the atmospheric pressure. Thus, it can prevent the mask from deteriorating and a foreign matter from entering thereinto.
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公开(公告)号:JPH0268948A
公开(公告)日:1990-03-08
申请号:JP22048788
申请日:1988-09-05
Applicant: CANON KK
Inventor: HARA SHINICHI , SAKAMOTO EIJI , SHIMODA ISAMU , UZAWA SHUNICHI
IPC: H01L21/683 , H01L21/68
Abstract: PURPOSE:To prevent reduction in patterning accuracy being based on thermal deformation by sucking a wafer to the fitting surface of the water stage with a specified suction force by wafer suction means, reducing suction force of the wafer suction means temporarily, and then sucking the wafer to the fitting surface of the wafer stage by the wafer suction means. CONSTITUTION:In an aligner provided with a wafer stage 5 having a wafer suction means and a transfer means 2 for transferring a wafer 1 and passing it to the wafer stage 5, the wafer transferred to the wafer fitting surface 6 of the wafer stage 5 is sucked to the fitting surface 6 with a specified suction force by the above wafer suction means, and then suction force of the above wafer suction means is temporarily reduced, then the wafer 1 is sucked to the fitting surface 6 of the wafer stage 5 by means of the wafer suction means. For example, the above wafer suction means is a vacuum chuck. Then, when reducing the suction force of the above wafer suction means temporarily, the wafer 1 is retained by the above transfer means 2 and the suction force is cancelled by the wafer suction means.
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公开(公告)号:JPH0267718A
公开(公告)日:1990-03-07
申请号:JP21852288
申请日:1988-09-02
Applicant: CANON KK
Inventor: KUROSAWA HIROSHI , AMAMIYA MITSUAKI , TERAJIMA SHIGERU , UDA KOJI , SHIMODA ISAMU , UZAWA SHUNICHI
IPC: H05H13/04 , G03F7/20 , H01L21/027 , H01L21/30
Abstract: PURPOSE:To obtain data on a profile having a large S/N ratio by a method wherein the illuminance distribution of a synchrotron radiant light in the viscosity of a mask or a wafer is metered immediately after electrons are injected in a storage ring and after an exchange of a transmitting window. CONSTITUTION:If an aligner 9 is started, a controller 6 discriminates whether a transmitting window 5 is exchanged or not and if the window 5 is exchanged, electrons are injected in a storage ring 2 and after the injection is completed, an instrumentation of a profile is conducted by an X-ray detector 18. As the instrumentation method, a method of measuring by moving a stage 19 mounted with the detector 19 at several places decided in advance in an exposure region is applied. On the basis of this data, a control table for a shutter 11 is made. In case the window 5 is not exchanged, whether an electron injection is performed in the ring 2 or not is discriminated and in the case of being immediately after the electron injection, a measurement of an illuminance distribution, which is performed by the X-ray detector 18, is conducted. In case the electron injection is not performed, a normal exposure operation is conducted.
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公开(公告)号:JPH0267716A
公开(公告)日:1990-03-07
申请号:JP21852588
申请日:1988-09-02
Applicant: CANON KK
Inventor: FUJIOKA HIDEHIKO , CHIBA YUJI , KUNO MITSUTOSHI , KARIYA TAKUO , SHIMODA ISAMU
IPC: G03F7/20 , H01L21/027 , H01L21/30
Abstract: PURPOSE:To make possible a stable operation even at the time of trouble of solenoid coils by a method wherein the attraction force of the solenoid coils is set at a certain constant ratio to that of a permanent magnet. CONSTITUTION:If a mask frame (a mask) 1 is approached a mask holder 4, a magnetic circuit is formed of a permanent magnet 5, the holder 4 and the frame 1 and the frame 1 is sucked and attracted by the magnet 5 and the holder 4. At the time of separation of the frame from the magnet and the holder, a current is made to flow through solenoid coils 6a and 6b from power supplies 8a and 8b through lead wires 7a and 7b in such a way that a magnetic flux reverse to that of the magnet 5 is generated and the magnetic forces of the coils and the magnet are temporarily cancelled to perform a separation operation. In this case, if the power supplies are respectively provided with a self- checking function, which is not shown in the diagram, and can feed the current without an erroneous operation, a stable operation can be commanded from a CPU 9 even in either case of a normal time and the time of trouble if there is the attraction force of the coils. Moreover, the number of the solenoid coils has only to be two or more and it is desirable that there are two or more as to the number of power supplies.
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公开(公告)号:JPH0267713A
公开(公告)日:1990-03-07
申请号:JP21852488
申请日:1988-09-02
Applicant: CANON KK
Inventor: KOBAYASHI MAKIKO , OZAWA KUNITAKA , UDA KOJI , MIZUSAWA NOBUTOSHI , SHIMODA ISAMU , UZAWA SHUNICHI
IPC: G03F7/20 , G03F9/00 , H01L21/027
Abstract: PURPOSE:To enable the alignment with high precision to be maintained for effecting the printing process with high precision by a method wherein the alignment of a negative and a substrate is done for printing once again if necessary between respective exposures time-divided. CONSTITUTION:Alignment marks made on a mask 1 and a wafer 2 are irradiated with alignment beams 5 to detect the position shifted amounts by an alignment optical system 4 for transmitting the amounts as position shifting signals 32 to a control circuit 11. The control circuit 11 starts a wafer stage driving device 13 to transmit driving signals 33 so that a wafer stage 3 may be driven to align the patterns of the mask 1 and the wafer 2 with each other for making alignment. Next, the control circuit 11 starts a shutter driving device 12 to transmit the other driving signals 31 so that a shutter 8 may be opened to perform the first exposure and then closed after lapse of specified time. The control circuit 11 checks if the mask 1 and the wafer 2 are irradiated with the light quantity required for the shot, if necessary amount of light has been cast, the exposure of the shot is terminated, and makes realignment if any more exposure is required.
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公开(公告)号:JPS63274048A
公开(公告)日:1988-11-11
申请号:JP10884787
申请日:1987-05-06
Applicant: CANON KK
Inventor: TSUKAMOTO TAKEO , MIYAWAKI MAMORU , SHIMODA ISAMU , SUZUKI AKIRA , KANEKO TETSUYA , TAKEDA TOSHIHIKO , OKUNUKI MASAHIKO
IPC: H01J37/073 , H01J1/30 , H01J1/304 , H01J9/02
Abstract: PURPOSE:To simplify the manufacture process of the tip of a cathode, and to make it possible to manufacture the unit highly accurately and in a thin type, by furnishing an electron emitting electrode with a tip and drawing-out electrodes with electron releasing outlets opposing to the tip, on an insulating base body approximately parallel to the insulating base body surface. CONSTITUTION:Approximately parallel to the surface of an insulating base body 1, an electron emitting electrode 3 with a tip, and drawing-out electrodes 3 and 4 opposing to the tip and with an electron releasing outlet are arranged. Between the electron emitting electrode 2, and the drawing-out electrodes 3 and 4, a voltage is applied to give a high potential to the drawing-out electrodes 3 and 4, electrons are emitted from the tip, and drawn out through the electron releasing outlets approximately parallel to the insulating base body surface. In such a composition, the electron emitting electrode 2 and the drawing-out electrodes 3 and 4 can be manufactured in the same process, and the accuracy of the relative positions is improved. Furthermore, since the electron emitting electrode 2 and the drawing-out electrodes 3 and 4 are formed on the same insulating base body 1, a thin unit can be manufactured.
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公开(公告)号:JPS63269530A
公开(公告)日:1988-11-07
申请号:JP10303787
申请日:1987-04-28
Applicant: CANON KK
Inventor: OKUNUKI MASAHIKO , SHIMODA ISAMU , MIYAWAKI MAMORU , TSUKAMOTO TAKEO , SUZUKI AKIRA , KANEKO TETSUYA , TAKEDA TOSHIHIKO , SEKI MITSUAKI
IPC: H01J37/06 , G11B9/10 , H01J37/305 , H01L21/027 , H01L21/30 , H01L21/66
Abstract: PURPOSE:To enhance the sensitivity and resolution of a medium, to increase an aspect ratio and to execute the high-efficiency irradiation with a beam by irradiating the sensitive medium with short-wavelength electromagnetic waves, e.g. ultraviolet rays. CONSTITUTION:While an EB source is deflected by its X-direction deflecting electrodes X1, X2 in an X-direction and a drawing operation is executed in the X-direction within a range to be covered by a deflection on the basis of the drawing information from a memory, a wafer WF and a head MB are continuously shifted relatively in a Y- direction. By this setup, all picture elements in the Y-direction in a 1/2 region are drawn. If an ultraviolet light source or a far ultraviolet light source is used as a light source LP, it can be used to excite a resist WR on the wafer WF. If this operation is executed prior to an EB exposure operation, a thin hard-to-dissolve layer is formed on the surface of the resist WR, and this layer becomes harder to dissolve by the EB exposure operation. Because a ratio of a film thickness to a line width to be drawn can be made big by this setup, the sensitivity or resolution (an aspect ratio) can be enhanced. Furthermore, when a thin film RS (an electron emission part) is irradiated with this far ultraviolet light source LP during the exposure operation, the number of electrons to be emitted is increased.
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公开(公告)号:JPS63269529A
公开(公告)日:1988-11-07
申请号:JP10303687
申请日:1987-04-28
Applicant: CANON KK
Inventor: OKUNUKI MASAHIKO , SHIMODA ISAMU , MIYAWAKI MAMORU , TSUKAMOTO TAKEO , SUZUKI AKIRA , KANEKO TETSUYA , TAKEDA TOSHIHIKO , SEKI MITSUAKI
IPC: H01J37/06 , G11B9/10 , H01J37/305 , H01L21/027 , H01L21/30 , H01L21/66
Abstract: PURPOSE:To enhance the sensitivity to a charged particle beam of a medium and to increase the resolution by a method wherein, prior to the irradiation with the charged particle beam, the sensitive medium is irradiated with ultraviolet rays of short-wavelength characteristic waves. CONSTITUTION:While each EB source is deflected by its X-direction deflecting electrodes X1, X2 in an X-direction and a drawing operation is executed in the X- direction within a range to be covered by a deflection on the basis of the drawing information from memories MU, ML, a wafer WF and a head MB are continuously shifted relatively in a Y-direction. By this setup, all picture elements in the Y-direction in a 1/2 region are drawn. If the drawing operation is repeated while an intermittent shift in the X-direction is repeated, one chip row in the Y-direction is drawn. If an ultraviolet light source or a far ultraviolet light source is used as a light source to be built in the MB, it can be used to excite a resist WR on the wafer WF. It this operation is used prior to an EB exposure operation, a thin hard-to-dissolve layer is formed on the surface of the resist WR and this layer becomes harder to dissolve by the EB exposure operation. Because a ratio of a film thickness to a line width to be drawn can be made big by this setup, the sensitivity or the resolution (an aspect ratio) can be enhanced.
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公开(公告)号:JPS63257157A
公开(公告)日:1988-10-25
申请号:JP8981387
申请日:1987-04-14
Applicant: CANON KK
Inventor: TSUKAMOTO TAKEO , SHIMIZU AKIRA , SUZUKI AKIRA , SUGATA MASAO , SHIMODA ISAMU , OKUNUKI MASAHIKO
Abstract: PURPOSE:To stably form a low-work function material layer by forming part of a metal material with an oxidized low-work function material and forming an insulator with an elaborate insulating layer and a rough insulating layer diffused with the low-work function material. CONSTITUTION:Part of a metal material is made of a low-work function material, and an insulator is made of an elaborate insulating layer and a rough insulating layer diffused with the low-work function material. That is, part of the insulating layer is constituted of the rough insulating layer with a structure liable to diffuse the low-work function material, the low-work function material precipitated from the diffused low-work function material or the remaining low-work function material are made a metal layer, and the electrons tunneling through the insulating layer can be emitted with the low energy. The metal layer made of the low-work function material is formed in an irregular shape, thus the high electric field is generated, part of the low-work function material constituting the metal layer is oxidized, the metal layer is thereby stabilized.
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公开(公告)号:JPS63234512A
公开(公告)日:1988-09-29
申请号:JP6789387
申请日:1987-03-24
Applicant: CANON KK
Inventor: SHIMODA ISAMU , SUZUKI AKIRA , KANEKO TETSUYA , TSUKAMOTO TAKEO , TAKEDA TOSHIHIKO , YONEHARA TAKAO , ICHIKAWA TAKESHI , OKUNUKI MASAHIKO
IPC: H01L23/34 , H01L21/20 , H01L21/205 , H01L21/84
Abstract: PURPOSE:To make it possible to perform the heat dissipation of an electronic circuit element by a method wherein the surface of deposition is constituted by a dielectric material, and the deposition surface is formed on a heat-transfer means. CONSTITUTION:The dielectric layer 2 is formed on the substrate 1 made of Cu, Al and the like which is a heat-transfer means. Besides, with single nucleus formed on the nuclei-formation base 4 made of the material heterogenous from the constitutional material of the dielectric layer 2 as the center, the single crystal such as Si and the like is grown on the dielectric layer 2, an insular single crystal is formed, it is flattened and a single crystal layer 3 is formed. Then, the semiconductor element such as a transistor, a diode and the like is formed. As the single crystal is directly grown on the dielectric layer 2 formed on a substrate 1 as above-mentioned, thermal resistance is low, and the heat generated on the semiconductor element can be dispersed efficiently to the conductive plate 1 through the intermediary of the dielectric layer 2.
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