中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

682 records (took 0.033 seconds)

    스텝-업 구조를 갖는 외팔보 및 그 제조방법
    101.
    发明公开
    스텝-업 구조를 갖는 외팔보 및 그 제조방법 失效
    具有升压结构的装置及其制造方法

    公开(公告)号：KR1020030059695A

    公开(公告)日：2003-07-10

    申请号：KR1020020000434

    申请日：2002-01-04

    Applicant: 삼성전자주식회사

    Inventor： 이희중

    IPC: B81B7/00

    CPC classification number: B81C1/0015 ,  B81B3/0078 ,  B81B2203/0118 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C2201/0109 ,  B81C2201/014

    Abstract: PURPOSE: A cantilever and a method for manufacturing the same are provided to achieve an MEMS(micro electro mechanical system) driving device capable of minimizing an initial bending deformation. CONSTITUTION: A cantilever(42) having a step-up structure includes a substrate, a supporting section fixing the substrate, and a moving plate(42d) connected to the supporting section while forming a predetermined gap between the substrate and the moving plate(42d). The supporting section includes a first supporting part(42a) having a predetermined shape, a second supporting part vertically installed at an edge of the first supporting part(42a) and arranged lengthwise the moving plate(42d), and a third supporting part(42c) aligned perpendicular to an edge of the first supporting part(42a) and parallel to the second supporting plate.

    Abstract translation: 目的：提供悬臂及其制造方法，以实现能够最小化初始弯曲变形的MEMS（微机电系统）驱动装置。 构成：具有升压结构的悬臂（42）包括基板，固定基板的支撑部和连接到支撑部的移动板（42d），同时在基板和移动板（42d）之间形成预定的间隙 ）。 所述支撑部包括具有预定形状的第一支撑部分（42a），垂直地安装在所述第一支撑部分（42a）的边缘并且沿所述移动板（42d）纵向设置的第二支撑部分，以及第三支撑部分 ）垂直于第一支撑部分（42a）的边缘并且平行于第二支撑板对准。

    VERFAHREN ZUR HERSTELLUNG EINES MIKROMECHANISCHEN BAUELEMENTS MIT EINER PARTIELLEN SCHUTZSCHICHT
    105.
    发明授权
    VERFAHREN ZUR HERSTELLUNG EINES MIKROMECHANISCHEN BAUELEMENTS MIT EINER PARTIELLEN SCHUTZSCHICHT 有权
    用于生产具有部分保护层的微机械部件

    公开(公告)号：EP2121515B1

    公开(公告)日：2011-09-07

    申请号：EP08734374.5

    申请日：2008-03-13

    Applicant: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.

    Inventor： MERZ, Peter ,  REIMER, Klaus ,  SENGER, Frank

    IPC: B81C1/00

    CPC classification number: B81C1/00801 ,  B81C2201/014

    Abstract: The invention relates to a method for producing a micromechanical component comprising at least one self-supporting structure. According to said method a conductor track plane (11) and a sacrificial layer (4) consisting of an electrically non-conductive material are applied to a substrate (2) in such a way that the conductor track plane (11) lies between the substrate (2) and the sacrificial layer (4) or inside the sacrificial layer (4), and a layer (3) that forms the self-supporting structure is deposited on the sacrificial layer (4), the latter (4) being partially removed by etching in order to complete the self-supporting structure. An electrically conductive protective layer (15) is embedded in the sacrificial layer (4) above a region on the conductor plane (11) that is to be protected, said protective layer acting as an etching barrier during the etching process for the removal of the sacrificial layer (4). The protective layer (15) is removed again in a subsequent process, leaving a thin sacrificial layer (17) as a passivation layer lying below on the conductor tracks. The method permits sensitive areas of the conductor track plane to be protected and can be simply achieved with existing surface micromechanical processes.

    VERFAHREN ZUM HERSTELLEN EINER MEMBRAN AUF EINEM HALBLEITERSUBSTRAT UND MIKROMECHANISCHES BAUELEMENT MIT EINER SOLCHEN MEMBRAN
    106.
    发明公开
    VERFAHREN ZUM HERSTELLEN EINER MEMBRAN AUF EINEM HALBLEITERSUBSTRAT UND MIKROMECHANISCHES BAUELEMENT MIT EINER SOLCHEN MEMBRAN 审中-公开
    用于生产在半导体基板和微机械部件的膜这样的膜

    公开(公告)号：EP1966076A1

    公开(公告)日：2008-09-10

    申请号：EP06819517.1

    申请日：2006-11-15

    Applicant: ROBERT BOSCH GMBH

    Inventor： SCHMOLLNGRUBER, Peter ,  WEBER, Heribert ,  ARTMANN, Hans ,  WAGNER, Thomas

    IPC: B81C1/00

    CPC classification number: B81C1/00158 ,  B81B3/0081 ,  B81C2201/014

    Abstract: A description is given of a method for producing a membrane (100) on a semiconductor substrate (1), which comprises the following method steps: a) providing a semiconductor substrate (1); b) creating trenches (2) in the semiconductor substrate (1), with webs (2) of semiconductor substrate remaining between the trenches (2); c) creating an oxide film (61) on the walls (31) of the trenches (2) by means of a thermal oxidation process; d) creating access openings (21) in a covering film (7), which has been created on the semiconductor substrate (1) in a previous method step, in order to bare the semiconductor substrate (1) in the regions of the webs (3); e) isotropic etching of the semiconductor substrate (1) bared in method step d) by means of a process that is selective with respect to the oxide film (61) and the covering film (7), with at least one cavity (4) being created in the webs (3) under the covering film (7), laterally bounded by the oxide film (61) of at least one trench (2); and f) depositing a sealing film (100), in order to seal the access openings (21) in the covering film (7).

    ETCHING METHOD AND SYSTEM
    107.
    发明公开
    ETCHING METHOD AND SYSTEM 有权
    ÄTZVERFAHRENUND -SYSTEM

    公开(公告)号：EP1793418A1

    公开(公告)日：2007-06-06

    申请号：EP05755673.0

    申请日：2005-06-23

    Applicant: ULVAC, INC.

    Inventor： MORIKAWA, Yasuhiro, c/o ULVAC, Inc. ,  HAYASHI, Toshio, c/o ULVAC, Inc. ,  SUU, Koukou,c/o ULVAC, Inc.

    IPC: H01L21/3065

    CPC classification number: H01L21/30655 ,  B81C1/00595 ,  B81C2201/014 ,  H01J37/3255 ,  H01J2237/334

    Abstract: Etching method and system capable of deep etching with a large mask selection ratio and an excellent anisotropy. The etching system comprises a floating electrode sustained in potentially floating state while facing a substrate electrode provided in a vacuum chamber, a material for forming an etching protection film provided on the side of the floating electrode facing the substrate electrode, and a control means for applying high frequency power intermittently to the floating electrode. In the etching method, a sputter film is formed on the substrate by applying high frequency power to the floating electrode using the material for forming an etching protection film provided on the side facing the substrate electrode of the floating electrode disposed oppositely to the substrate electrode as a target material and using only rare gas as main gas. Subsequently, application of high frequency power to the floating electrode is interrupted, the substrate is etched by introducing etching gas into the vacuum chamber, and formation of the sputter film on the substrate and etching of the substrate are repeated according to a scheduled sequence (Fig. 1).

    Abstract translation: 蚀刻方法和系统能够以较大的掩模选择比和优异的各向异性进行深蚀刻。 该蚀刻系统包括一浮动电极，其处于潜在的浮动状态，同时面对设置在真空室中的基板电极，形成设置在面向基板电极的浮置电极一侧上的蚀刻保护膜的材料，以及用于施加 高频功率间歇地连接到浮动电极。 在蚀刻方法中，使用用于形成设置在与衬底电极相对设置的浮置电极的衬底电极侧的蚀刻保护膜的材料，向浮动电极施加高频电力，在衬底上形成溅射膜， 目标材料，仅使用稀有气体作为主要气体。 随后，中断向浮动电极施加高频电源，通过将蚀刻气体引入真空室来蚀刻衬底，并且根据预定的顺序重复在衬底上形成溅射膜和蚀刻衬底（图 1）。

    Technique for manufacturing silicon structures
    108.
    发明公开
    Technique for manufacturing silicon structures 审中-公开
    Herstellungsverfahren von Siliziumstrukturen

    公开(公告)号：EP1717196A1

    公开(公告)日：2006-11-02

    申请号：EP06075842.2

    申请日：2006-04-07

    Applicant: Delphi Technologies, Inc.

    Inventor： Baney, William J. ,  Chilcott, Dan W.

    IPC: B81C1/00 ,  G01L9/00 ,  H01L29/02

    CPC classification number: B81C1/00158 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/019 ,  G01L9/0042

    Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer (506). A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer (510). After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer (516), which is opposite the first side of the epitaxial wafer.

    Abstract translation: 制造硅结构的技术包括将空腔蚀刻到外延晶片（506）的第一侧。 基于蚀刻腔的期望深度和期望的膜厚选择外延层的厚度。 然后将外延晶片的第一侧接合到处理晶片（510）的第一侧。 在使外延晶片变薄直到仅剩余外延层之后，在与外延晶片的第一侧相对的剩余外延层（516）的第二侧上形成所需的电路。

    Integrated released beam layer structure fabricated in trenches and manufacturing method thereof
    110.
    发明公开
    Integrated released beam layer structure fabricated in trenches and manufacturing method thereof 有权
    这是在所述沟槽和相应的生产方法制成的集成释放堤层结构

    公开(公告)号：EP1547969A3

    公开(公告)日：2006-04-12

    申请号：EP04257172.9

    申请日：2004-11-19

    Applicant: STMicroelectronics, Inc.

    Inventor： Blanchard, Richard A. ,  McAlexander, Joseph C.

    IPC: B81B3/00

    CPC classification number: B81C1/00626 ,  B81B2201/0235 ,  B81B2203/0118 ,  B81B2203/033 ,  B81C2201/0109 ,  B81C2201/014

    Abstract: A released beam structure fabricated in trench and manufacturing method thereof are provided herein. One embodiment of a released beam structure according to the present invention comprises a semiconductor substrate, a trench, a first conducting layer, and a beam. The trench extends into the semiconductor substrate and has walls. The first conducting layer is positioned over the walls of the trench at selected locations. The beam is positioned with the trench and is connected at a first portion thereof to the semiconductor substrate and movable at a second portion thereof. The second portion of the beam is spaced from the walls of the trench by a selected distance. Therefore, the second portion of the beam is free to move in a plane that is perpendicular or parallel to the surface of the substrate, and could be deflected to electrically contact with the walls of the trench in response to a predetermined acceleration force or a predetermined temperature variation applied on the beam structure. Other beam structures such as a beam held at both ends, or a beam held in the middle are also possible. Several beam structures at different angles can be fabricated simultaneously and mechanical etching stops are automatically formed to prevent unwanted overstress conditions when manufacturing several beam structures at the same time. Beam structures can also be manufactured in three orthogonal directions, providing information on acceleration in any direction.

Patent Agency Ranking