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    Process for a monolithically-integrated micromachined sensor and circuit
    2.
    发明公开
    Process for a monolithically-integrated micromachined sensor and circuit 有权
    一种用于制造单片集成微机械传感器和电路的方法

    公开(公告)号：EP1333503A3

    公开(公告)日：2009-11-18

    申请号：EP03075166.3

    申请日：2003-01-17

    Applicant: Delphi Technologies, Inc.

    Inventor： Chavan, Abhijeet V. ,  Logsdon, James H. ,  Chilcott, Dan W. ,  Christenson, John C. ,  Speck, Robert K.

    IPC: H01L35/00 ,  H01L27/16

    CPC classification number: B81B3/0072 ,  B81B2201/0278 ,  B81B2203/0127 ,  G01J5/02 ,  G01J5/024 ,  G01J5/12 ,  H01L27/16 ,  H01L2224/48463

    Abstract: A process using integrated sensor technology in which a micromachined sensing element (12) and signal processing circuit (14) are combined on a single semiconductor substrate (20) to form, for example, an infrared sensor (10). The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm (16), after the circuit fabrication process is completed. The process generally entails forming a circuit device (14) on a substrate (20) by processing steps that include forming multiple dielectric layers (34,36,38,44,46) and at least one conductive layer (40,50) on the substrate (20). The dielectric layers (34,36,38,44,46) comprise an oxide layer (34) on a surface of the substrate (20) and at least two dielectric layers (36,46) that are in tension, with the conductive layer (40,50) being located between the two dielectric layers (36,46). The surface of the substrate (20) is then dry etched to form a cavity (32) and delineate the diaphragm (16) and a frame (18) surrounding the diaphragm (16). The dry etching step terminates at the oxide layer (34), such that the diaphragm (16) comprises the dielectric layers (34,36,38,44,46) and conductive layer (40,50). A special absorber (52) is preferably fabricated on the diaphragm (16) to promote efficient absorption of incoming infrared radiation.

    Technique for manufacturing micro-electro mechanical structures
    3.
    发明公开
    Technique for manufacturing micro-electro mechanical structures 审中-公开
    Technik zum Herstellen von mikroelektromechanischen Strukturen

    公开(公告)号：EP1712515A2

    公开(公告)日：2006-10-18

    申请号：EP06075741.6

    申请日：2006-03-30

    Applicant: Delphi Technologies, Inc.

    Inventor： Chilcott, Dan W.

    IPC: B81C1/00

    CPC classification number: B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0264 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C2201/0135 ,  B81C2201/014 ,  B81C2201/017

    Abstract: A technique (400) for manufacturing a micro-electro mechanical structure includes a number of steps. Initially, a cavity is formed into a first side of a handling wafer (404), with a sidewall of the cavity forming a first angle greater than about 54.7 degrees with respect to a first side of the handling wafer at an opening of the cavity. Then, a bulk etch is performed on the first side of the handling wafer to modify the sidewall of the cavity to a second angle greater than about 90 degrees (406), with respect to the first side of the handling wafer at the opening of the cavity. Next, a second side of a second wafer is bonded to the first side of the handling wafer (408).

    Abstract translation: 用于制造微机电结构的技术（400）包括多个步骤。 最初，空腔形成处理晶片（404）的第一侧，空腔的侧壁在空腔的开口处相对于处理晶片的第一侧形成大于约54.7度的第一角度。 然后，在处理晶片的第一侧上执行体蚀刻，以将腔的侧壁相对于处理晶片的开口处的第一侧相对于第二角度大于约90度（406） 腔。 接下来，将第二晶片的第二面接合到处理晶片（408）的第一侧。

    Method for manufacturing a sensor device
    4.
    发明公开
    Method for manufacturing a sensor device 审中-公开
    一种用于制造传感器的方法

    公开(公告)号：EP2082989A3

    公开(公告)日：2013-10-09

    申请号：EP09150363.1

    申请日：2009-01-12

    Applicant: Delphi Technologies, Inc.

    Inventor： Christenson, John C. ,  Chilcott, Dan W. ,  Forestal, Richard G. ,  Glenn, Jack L. ,  Zarabadi, Seyed R.

    IPC: B81C1/00 ,  B81B3/00

    CPC classification number: B81C1/00246 ,  B81B3/001 ,  B81B2201/0242 ,  B81C2203/0735

    Abstract: A method of making a silicon integrated sensor on an SOI substrate is provided. The method includes the step of providing a substrate having an insulation layer on a top surface, and providing a silicon epitaxial layer on top of the insulation layer. The method also includes the steps of forming a first trench extending through the epitaxial layer and reaching the insulation layer so as to isolate a first portion of the epitaxial layer from a second portion of the epitaxial layer, and disposing a fill material within the first trench. The method also includes the steps of forming one or more electrical components on the first portion of the epitaxial layer, and forming one or more contacts on the second portion of the epitaxial layer. The method further includes the step of forming one or more second trenches in the second portion of the epitaxial layer so as to provide one or more moving element within the second portion of the epitaxial layer, wherein the one or more movable elements serve as sensing element.

    Method of making a soi silicon structure
    5.
    发明公开
    Method of making a soi silicon structure 审中-公开
    一种用于制造SOI结构的方法

    公开(公告)号：EP1734000A3

    公开(公告)日：2011-10-12

    申请号：EP06076128.5

    申请日：2006-05-30

    Applicant: Delphi Technologies, Inc.

    Inventor： Chilcott, Dan W.

    IPC: B81C1/00

    CPC classification number: B81C1/00944 ,  B81C2201/0132

    Abstract: A process for making a microelectromechanical device having a moveable component defined by a gap pattern in a semiconductor layer of a silicon-on-insulator wafer (10) involves the use of a plurality of deep reactive ion etching steps at various etch depths that are used to allow a buried oxide layer (14) of the silicon-on-insulator wafer (10) to be exposed in selected areas before the entire moveable component of the resulting device is freed for movement. This method allows wet release techniques to be used to remove the buried oxide layer (14) without developing stiction problems. This is achieved by utilizing deep reactive ion etching to free the moveable component after a selected portion of the buried oxide layer (14) has been removed by wet etching.

    Method for manufacturing a micro-electro-mechanical structure
    7.
    发明公开
    Method for manufacturing a micro-electro-mechanical structure 有权
    一种制造微机电结构的方法

    公开(公告)号：EP1770056A3

    公开(公告)日：2008-09-10

    申请号：EP06076692.0

    申请日：2006-09-07

    Applicant: Delphi Technologies, Inc.

    Inventor： Chilcott, Dan W.

    IPC: B81B3/00 ,  B81C1/00

    CPC classification number: B81C1/00531 ,  B81B2203/033 ,  B81C2201/0132 ,  B81C2201/0142

    Abstract: A technique (500) for manufacturing a micro-electro-mechanical (MEM) structure includes a number of steps. Initially, a substrate is provided (502). Next, a plurality of trenches are etched into the substrate with a first etch (508). Then, a charging layer is formed at a bottom of each of the trenches to form undercut trenches (510). Finally, a second etch is provided into the undercut trenches. The charging layer causes the second etch to laterally etch foots in the substrate between the undercut trenches (512). The footers undercut the substrate to release a portion of the substrate for providing a movable structure between the undercut trenches and above the footers.

    Process for a monolithically-integrated micromachined sensor and circuit
    9.
    发明公开
    Process for a monolithically-integrated micromachined sensor and circuit 有权
    Verfahren zur Herstellung eines ines ines ises chen chen chen chen chen chen chen chen chen chen chen

    公开(公告)号：EP1333503A2

    公开(公告)日：2003-08-06

    申请号：EP03075166.3

    申请日：2003-01-17

    Applicant: Delphi Technologies, Inc.

    Inventor： Chavan, Abhijeet V. ,  Logsdon, James H. ,  Chilcott, Dan W. ,  Christenson, John C. ,  Speck, Robert K.

    IPC: H01L35/00 ,  H01L27/16

    CPC classification number: B81B3/0072 ,  B81B2201/0278 ,  B81B2203/0127 ,  G01J5/02 ,  G01J5/024 ,  G01J5/12 ,  H01L27/16 ,  H01L2224/48463

    Abstract: A process using integrated sensor technology in which a micromachined sensing element (12) and signal processing circuit (14) are combined on a single semiconductor substrate (20) to form, for example, an infrared sensor (10). The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm (16), after the circuit fabrication process is completed. The process generally entails forming a circuit device (14) on a substrate (20) by processing steps that include forming multiple dielectric layers (34,36,38,44,46) and at least one conductive layer (40,50) on the substrate (20). The dielectric layers (34,36,38,44,46) comprise an oxide layer (34) on a surface of the substrate (20) and at least two dielectric layers (36,46) that are in tension, with the conductive layer (40,50) being located between the two dielectric layers (36,46). The surface of the substrate (20) is then dry etched to form a cavity (32) and delineate the diaphragm (16) and a frame (18) surrounding the diaphragm (16). The dry etching step terminates at the oxide layer (34), such that the diaphragm (16) comprises the dielectric layers (34,36,38,44,46) and conductive layer (40,50). A special absorber (52) is preferably fabricated on the diaphragm (16) to promote efficient absorption of incoming infrared radiation.

    Abstract translation: 一种使用集成传感器技术的方法，其中微机械感测元件（12）和信号处理电路（14）组合在单个半导体衬底（20）上以形成例如红外传感器（10）。 该方法基于在电路制造过程完成之后修改CMOS工艺以产生改进的分层微加工构件，例如隔膜（16）。 该方法通常需要通过处理步骤在衬底（20）上形成电路器件（14），该步骤包括在其上形成多个电介质层（34,36,38,44,46）和至少一个导电层（40,50） 衬底（20）。 电介质层（34,36,38,44,46）在衬底（20）的表面上包括氧化物层（34）和处于张力的至少两个电介质层（36,46），导电层 （40,50）位于两个电介质层（36,46）之间。 然后干燥蚀刻衬底（20）的表面以形成空腔（32）并描绘隔膜（16）和围绕隔膜（16）的框架（18）。 干蚀刻步骤终止在氧化物层（34）处，使得隔膜（16）包括电介质层（34,36,38,44,46）和导电层（40,50）。 优选地，在隔膜（16）上制造特殊吸收器（52）以促进进入的红外辐射的有效吸收。

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