公开(公告)号：KR100877292B1

公开(公告)日：2009-01-07

申请号：KR1020077010489

申请日：2006-10-05

Applicant: 가부시키가이샤 무라타 세이사쿠쇼

Inventor： 노무라마사토 ,  이에키츠토무

IPC: H01L23/02 ,  H01L23/50

CPC classification number: H05K1/141 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0218 ,  H05K1/144 ,  H05K1/181 ,  H05K1/183 ,  H05K3/20 ,  H05K3/284 ,  H05K3/3442 ,  H05K2201/045

Abstract: 비용 저감이 가능하며, 수율 향상을 달성할 수 있는 부품 내장 모듈을 제공한다.
부품 내장 모듈(A)은 상면에 제1의 배선(2)을 갖는 모듈 기판(1)과, 모듈 기판의 제1의 배선상에 실장된 제1의 회로부품(7)과, 제1의 회로부품이 실장된 부위 이외의 모듈 기판의 제1의 배선상에 실장되며, 모듈 기판보다 소면적의 서브모듈 기판(10)과, 서브모듈 기판의 상면의 제2의 배선(11)에 실장된 제2의 회로부품(15)과, 모듈 기판의 상면 전면에, 제1의 회로부품, 제2의 회로부품 및 서브모듈 기판을 둘러싸도록 형성된 절연 수지층(20)을 구비한다. 서브모듈 기판(10)으로서 모듈 기판(1)보다 배선 정밀도가 높은 기판을 사용함으로써, 서브모듈 기판상에 집적회로소자(15a)를 탑재할 수 있으며, 신뢰성이 높고 저렴한 부품 내장 모듈을 얻는다.
부품 내장 모듈, 모듈 기판, 서브모듈 기판, 절연 수지층, 배선, 집적회로소자

公开(公告)号：KR1020080009229A

公开(公告)日：2008-01-25

申请号：KR1020077028729

申请日：2007-02-01

Applicant: 이비덴 가부시키가이샤

Inventor： 요코마쿠도시히코

IPC: H05K3/46 ,  H05K3/34

CPC classification number: H05K3/3463 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16251 ,  H05K1/0262 ,  H05K1/141 ,  H05K3/341 ,  H05K3/3415 ,  H05K3/3457 ,  H05K3/4602 ,  H05K2201/045 ,  H05K2201/10189 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10674 ,  H05K2203/1572 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2224/05599

Abstract: Provided are a multilayer printed-circuit board, which can mount parts easily, which is excellent in working efficiency or which is easily reworkable, and a mounting method therefor. The method mounts the parts of the multilayer printed-circuit board, which is formed with a plurality of solder bumps for mounting the electronic parts on the surface side and/or the back side. The solder bumps are individually formed of any of a first solder, a second solder and a third solder, and the electronic parts and so on are soldered sequentially from the higher melting point, when the first solder, the second solder and the third solder have melting points in the order of a higher temperature of the first solder, the second solder and the third solder. At this time, it is preferred that the solder bump having the larger volume is soldered the earlier.

Abstract translation: 提供一种多层印刷电路板，其可以容易地安装部件，其工作效率优异或易于再加工，并且其安装方法。 该方法安装多层印刷电路板的部件，其形成有用于将电子部件安装在表面侧和/或背面上的多个焊料凸块。 焊料凸块由第一焊料，第二焊料和第三焊料中的任一个单独形成，并且当第一焊料，第二焊料和第三焊料具有第一焊料，第二焊料和第三焊料时，电子部件等从较高熔点顺序地焊接 第一焊料，第二焊料和第三焊料的温度高的顺序的熔点。 此时，优选较早地焊接具有较大体积的焊料凸块。

公开(公告)号：KR1020070120149A

公开(公告)日：2007-12-21

申请号：KR1020077023495

申请日：2006-03-10

Applicant: 인텔 코포레이션

Inventor： 스탈더글라스 ,  포미사노데이비드 ,  사파리안앤디 ,  커리마완

IPC: H01R31/06 ,  H05K1/14 ,  G06F13/00

CPC classification number: H05K1/14 ,  H05K1/144 ,  H05K2201/044 ,  H05K2201/045

Abstract: An Advanced Mezzainine Card An Advanced Mezzanine Card (AMC) adapter may be used to connect a non-AMC mezzanine cared to an AMC carrier. The AMC adapter may include a card edge connector configured to be connected to an AMC connector on the AMC carrier and one or more mezzanine connectors configured to be connected to the non-MC mezzanine card. The AMC adapter may also include a bridge to convert between communication protocols used by the non-AMC mezzanine card and the AMC carrier. Of course, many alternatives, variations, and modification are possible without departing from this embodiment.

Abstract translation: 高级Mezzainine卡高级夹层卡（AMC）适配器可用于将非AMC夹层连接到AMC运营商。 AMC适配器可以包括被配置为连接到AMC载体上的AMC连接器并且被配置为连接到非MC夹层卡的一个或多个夹层连接器的卡缘连接器。 AMC适配器还可以包括用于在非AMC夹层卡和AMC载波之间使用的通信协议之间进行转换的桥接器。 当然，在不脱离本实施例的情况下，可以进行许多替换，变化和修改。

公开(公告)号：US11901108B2

公开(公告)日：2024-02-13

申请号：US16953365

申请日：2020-11-20

Applicant: Delta Electronics (Shanghai) Co., Ltd.

Inventor： Jin-Fa Zhang ,  Hai-Jun Yang ,  Zhong-Wei Ke ,  Kai Dong ,  Shuai-Lin Du

IPC: H01F27/28 ,  H05K7/20 ,  H05K1/18 ,  H05K1/14 ,  H01F17/04 ,  H02M1/42 ,  H01F17/00 ,  H02M1/00 ,  H02M3/00 ,  H02M3/335

CPC classification number: H01F27/2804 ,  H01F17/04 ,  H01F27/28 ,  H02M1/4225 ,  H05K1/141 ,  H05K1/181 ,  H05K7/20909 ,  H01F2017/0093 ,  H02M1/0085 ,  H02M3/003 ,  H02M3/01 ,  H02M3/33573 ,  H05K2201/045 ,  H05K2201/1003 ,  H05K2201/1006

Abstract: A power module includes a printed circuit board (PCB), a magnetic element, primary and secondary winding circuits and a regulator. The magnetic element is disposed on the PCB and has first to fourth sides. The second side is opposite to the first side, the fourth side is opposite to the third side. The primary winding circuit is disposed on the PCB and positioned in a vicinity of the first or second side. The secondary winding circuit is disposed on the first PCB and positioned in a vicinity of the third or fourth side. The regulator includes a switch disposed on the PCB, and coupled to the primary winding circuit. The at least one switch, the primary winding circuit, and the magnetic element are arranged in a first direction in order. A power device is also disclosed herein.

公开(公告)号：US20180316375A1

公开(公告)日：2018-11-01

申请号：US15769723

申请日：2015-12-08

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Richard J. DISCHLER

IPC: H04B1/18 ,  H01L23/498 ,  H01L25/16 ,  H01P5/08 ,  H01P3/16 ,  H01L23/66 ,  H01P1/24 ,  H01L23/367 ,  H01L25/065 ,  H05K1/18 ,  H05K1/14

CPC classification number: G06F1/16 ,  H05K1/0274 ,  H05K1/147 ,  H05K2201/045 ,  H05K2201/046

Abstract: Wireless interconnects are shown on flexible cables for communication between computing platforms. One example has an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, a cable on the package substrate coupled to the integrated circuit chip at one end, a radio chip on the cable coupled to the cable at the other end, the radio chip to modulate data over a carrier and to transmit the modulated data, and a waveguide transition coupled to a dielectric waveguide to receive the transmitted modulated data from the radio and to couple it into the waveguide, the waveguide to carry the modulated data to an external component.

公开(公告)号：US09980381B2

公开(公告)日：2018-05-22

申请号：US14571369

申请日：2014-12-16

Applicant: MOTOROLA SOLUTIONS, INC

Inventor： Seng Huan Chuah ,  Friedrich Josef Bollmann ,  Khai Jin Choo ,  Weng Kong Hor ,  Sih Hau Tan

IPC: H05K1/11 ,  H05K1/14 ,  H04M1/02 ,  H05K5/06 ,  H05K1/02

CPC classification number: H05K1/144 ,  H04M1/0277 ,  H05K1/0215 ,  H05K1/0224 ,  H05K1/14 ,  H05K5/064 ,  H05K2201/041 ,  H05K2201/042 ,  H05K2201/043 ,  H05K2201/045 ,  H05K2201/10371 ,  H05K2201/10409 ,  H05K2201/2018

Abstract: A method and circuit board arrangement for an intrinsically safe portable device includes two or more circuit boards having a frame structure that forms a contiguous boundary around a space between the circuit boards. In the space there are circuit components mounted on both circuit boards, and a connector that connect the two circuit boards. An encapsulant material fills the space bounded by the frame structure between the circuit boards to exclude airborne material from coming into contact with the encapsulated circuit components.

公开(公告)号：US09220167B2

公开(公告)日：2015-12-22

申请号：US14623689

申请日：2015-02-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Noriyoshi Shimizu ,  Masato Tanaka ,  Toshinori Koyama ,  Akio Rokugawa

IPC: H01L23/12 ,  H05K1/02 ,  H01L23/498 ,  H01L21/48 ,  H05K1/03 ,  H05K1/11 ,  H05K3/46 ,  H01L23/15 ,  H01L23/538

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/12044 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K3/429 ,  H05K3/46 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0191 ,  H05K2201/045 ,  H05K2201/09409 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09827 ,  H05K2201/10204 ,  H05K2201/10674 ,  Y10T29/49162 ,  H01L2924/00

Abstract: A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower surface of the first wiring structure. The outermost insulating layer covers a part of a bottom wiring layer of the wiring layers forming the first wiring structure. The second wiring structure has a wiring density higher than that of the first wiring structure. A volume ratio V1/V2 is from 0.8 to 1.5, where V1 represents the volume of the wiring layers forming the entire second wiring structure, and V2 represents the volume of the bottom wiring layer in the first wiring structure.

Abstract translation: 布线基板包括第一布线结构，堆叠在第一布线结构的上表面上的第二布线结构和堆叠在第一布线结构的下表面上的最外绝缘层。 最外层绝缘层覆盖形成第一布线结构的布线层的底部布线层的一部分。 第二布线结构具有比第一布线结构高的布线密度。 体积比V1 / V2为0.8〜1.5，其中V1表示形成整个第二布线结构的布线层的体积，V2表示第一布线结构中底布线层的体积。

公开(公告)号：US20150245473A1

公开(公告)日：2015-08-27

申请号：US14623689

申请日：2015-02-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Noriyoshi SHIMIZU ,  Masato TANAKA ,  Toshinori KOYAMA ,  Akio ROKUGAWA

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/03 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/12044 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K3/429 ,  H05K3/46 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0191 ,  H05K2201/045 ,  H05K2201/09409 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09827 ,  H05K2201/10204 ,  H05K2201/10674 ,  Y10T29/49162 ,  H01L2924/00

Abstract: A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower surface of the first wiring structure. The outermost insulating layer covers a part of a bottom wiring layer of the wiring layers forming the first wiring structure. The second wiring structure has a wiring density higher than that of the first wiring structure. A volume ratio V1/V2 is from 0.8 to 1.5, where V1 represents the volume of the wiring layers forming the entire second wiring structure, and V2 represents the volume of the bottom wiring layer in the first wiring structure.

Abstract translation: 布线基板包括第一布线结构，堆叠在第一布线结构的上表面上的第二布线结构和堆叠在第一布线结构的下表面上的最外绝缘层。 最外层绝缘层覆盖形成第一布线结构的布线层的底部布线层的一部分。 第二布线结构具有比第一布线结构高的布线密度。 体积比V1 / V2为0.8〜1.5，其中V1表示形成整个第二布线结构的布线层的体积，V2表示第一布线结构中底布线层的体积。

公开(公告)号：US09099999B1

公开(公告)日：2015-08-04

申请号：US13485768

申请日：2012-05-31

Applicant: Bonnie I. Wang ,  Chiakang Sung ,  Joseph Huang ,  Khai Nguyen ,  Tony Ngai ,  Zhe Li ,  Hong Shi

Inventor： Bonnie I. Wang ,  Chiakang Sung ,  Joseph Huang ,  Khai Nguyen ,  Tony Ngai ,  Zhe Li ,  Hong Shi

IPC: H01L29/73 ,  H01L29/40 ,  H03K17/00 ,  H05K1/18 ,  H01L25/065 ,  H01L27/06

CPC classification number: H03K17/00 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/045 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00

Abstract: An integrated circuit in a multi-chip package is provided. The integrated circuit may include adjustable interface circuitry configured to interface with other off-chip components. In particular, the adjustable interface circuitry may include a microbump input-output buffer operable to drive signals off of the integrated circuit and operable to receive signals from other integrated circuits in the multi-chip package via a microbump. The microbump input-output buffer may include output buffers and input buffers. The output buffers may have programmable drive strengths and may each be selectively switched in and out of use depending on the desired application. Each output buffer may include a level shifter, a buffer circuit, and multiple inverter-like circuits each of which can be turned on or off to adjust the drive strength of that output buffer.

Abstract translation: 提供了一种多芯片封装中的集成电路。 该集成电路可以包括被配置为与其它片外部件接口的可调节接口电路。 特别地，可调接口电路可以包括微控制输入 - 输出缓冲器，其可操作用于驱动离开集成电路的信号，并且可操作以经由微型小型接收器从多芯片封装中的其他集成电路接收信号。 微控制输入 - 输出缓冲器可以包括输出缓冲器和输入缓冲器。 输出缓冲器可以具有可编程驱动强度，并且可以根据期望的应用选择性地切换和使用。 每个输出缓冲器可以包括电平移位器，缓冲电路和多个类似逆变器的电路，每个可以导通或关断以调整该输出缓冲器的驱动强度。

公开(公告)号：US09042108B2

公开(公告)日：2015-05-26

申请号：US13702216

申请日：2011-04-11

Applicant: Kazuhiro Nobori

Inventor： Kazuhiro Nobori

IPC: H05K1/00 ,  H05K7/00 ,  G02F1/1345 ,  H05K1/14 ,  H05K3/36 ,  H05K13/00 ,  H05K3/32

CPC classification number: H05K7/00 ,  G02F1/13452 ,  H01L2924/0002 ,  H05K1/147 ,  H05K3/323 ,  H05K3/361 ,  H05K13/00 ,  H05K2201/045 ,  H05K2201/055 ,  H05K2201/09445 ,  Y10T29/49124 ,  H01L2924/00

Abstract: In a display device (100), a row of protruding electrodes (115) and a row of protruding electrodes (116) are formed on the connecting surface of a terminal section (112), the row of the protruding electrodes (116) is disposed between the row of the protruding electrodes (115) and a display section (111), one end of a flexible printed board (150) is connected to the row of the protruding electrodes (115), one end of a flexible printed board (160) is connected to the row of the protruding electrodes (116), the row of the protruding electrodes (115) is adjacent to the row of the protruding electrodes (116), and the one end of the flexible printed board (150) and the one end of the flexible printed board (160) are opposed to each other.

Abstract translation: 在显示装置（100）中，在端子部（112）的连接面上形成有一排突出电极（115）和一排突出电极（116），一排突出电极（116） 在一排突出电极（115）和显示部分（111）之间，柔性印刷电路板（150）的一端连接到一排突出电极（115），柔性印刷电路板（160）的一端 ）连接到所述突出电极（116）的行，所述突出电极（115）的行与所述突出电极（116）的行相邻，并且所述柔性印刷电路板（150）的一端和 柔性印刷电路板（160）的一端彼此相对。