公开(公告)号：KR1020100017408A

公开(公告)日：2010-02-16

申请号：KR1020097024714

申请日：2008-05-29

Applicant: 오컴 포트폴리오 엘엘씨

Inventor： 프젤스태드요셉씨.

IPC: H01L23/48 ,  H05K3/32

CPC classification number: H05K1/144 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01063 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/3025 ,  H05K1/0207 ,  H05K1/185 ,  H05K3/284 ,  H05K3/4664 ,  H05K2201/042 ,  H05K2201/043 ,  H05K2201/10189 ,  H05K2201/10318 ,  H05K2201/10386 ,  H05K2201/1056 ,  H05K2203/1316 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention provides an electronic assembly 400 and a method for its manufacture 800, 900, 1000 1200, 1400, 1500, 1600, 1700. The assembly 400 uses no solder. Components 406, or component packages 402, 802, 804, 806 with I/O leads 412 are placed 800 onto a planar substrate 808. The assembly is encapsulated 900 with electrically insulating material 908 with vias 420, 1002 formed or drilled 1000 through the substrate 808 to the components' leads 412. Then the assembly is plated 1200 and the encapsulation and drilling process 1500 repeated to build up desired layers 422, 1502, 1702. Assemblies may be mated 1800. Within the mated assemblies, items may be inserted including pins 2202a, 2202b, and 2202c, mezzanine interconnection devices 2204, heat spreaders 2402, and combination heat spreaders and heat sinks 2602. Edge card connectors 2802 may be attached to the mated assemblies.

Abstract translation: 本发明提供电子组件400及其制造方法800,900,10001200,1400,1500,1600,1700。组件400不使用焊料。 具有I / O引线412的组件406或组件封装402,802,804,806被放置在800平面衬底808上。该组件被电绝缘材料908封装，电绝缘材料908具有穿过衬底形成或钻孔1000的通孔420,1002。 808到组件引线412.然后组件被电镀1200，并且重复进行封装和钻孔工艺1500以构建所需的层422,1502,1702。组件可以配合1800.在配合的组件内，物品可以被插入，包括销 2202a，2202b和2202c，夹层互连设备2204，散热器2402以及散热器和散热器2602组合。边缘卡连接器2802可以附接到配合的组件。

公开(公告)号：KR100880054B1

公开(公告)日：2009-01-22

申请号：KR1020050074824

申请日：2005-08-16

Applicant: 스탁텍 그룹 엘.피.

Inventor： 굿윈,폴 ,  캐디,제임스더블유. ,  웰리,제임스더글러스주니어.

IPC: H01L25/04

CPC classification number: H05K1/189 ,  G11C5/04 ,  H01L25/105 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  H01L2224/0401

Abstract: 플렉스 회로(Flexible circuit)는 그 주측부 중 하나 또는 두 측부 모두를 따라 배열되는 집적 회로(IC)들로 점유된다. 플렉스 회로를 따라 분포되는 접점들은 IC들에 대한 연결을 제공한다. 플렉스 회로가 견고한 열전도성 기판의 변부 둘레로 배열되는 것이 바람직하다. 그래서, 기판의 한 측부나 두 측부 모두에 집적 회로의 한개나 두개 층을 위치시키면서, 기판의 한 측부나 두 측부 모두에 집적 회로를 위치시키는 것이 바람직하다. 대안의 선호되는 실시예로서, 기판에 가장 가까운 플렉스 회로의 측부 상의 IC들이 기판의 윈도, 포켓, 또는 잘려진 영역에 배열된다. 다른 실시예들은 플렉스 회로의 한 측부만을 점유할 수 있고, 또는, 모듈 프로파일을 감소시키도록 기판 물질을 제거할 수도 있다. 선호되는 실시예에서, 플렉스 회로를 따라 분포되는 접점들은 범용 컴퓨터 및 서버 컴퓨터(일례에 불과함)에서 발견되는 변부 커넥터 소켓에 삽입되도록 구성된다. 선호되는 기판들은 열전도성 물질로 구성된다. 선호되는 실시예에서 기판으로부터의 팽창부들은 열적 모듈 로딩을 감소시킬 것으로 기대되며, 동작 중 모듈의 집적 회로 중에서 열적 변화를 감소시킬 것으로 기대된다.

公开(公告)号：EP3410474A1

公开(公告)日：2018-12-05

申请号：EP18173808.9

申请日：2018-05-23

Applicant: MediaTek Inc.

Inventor： SUN, Ruey-Bo ,  WU, Wen-Chou

IPC: H01L23/552 ,  H01L23/66 ,  H05K1/02

CPC classification number: H01L23/552 ,  H01L23/06 ,  H01L23/373 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16225 ,  H05K1/0203 ,  H05K1/0215 ,  H05K1/0216 ,  H05K7/20454 ,  H05K9/0032 ,  H05K2201/09972 ,  H05K2201/10371 ,  H05K2201/1056

Abstract: A microelectronic assembly includes a substrate (10) and a first microelectronic component (20) mounted on the substrate (10). The first microelectronic component (20) includes a digital/analog IP block (201) and a RF IP block (202) . A shielding case (40) is mounted on the substrate (10). The shielding case (40) includes a plurality of sidewalls (401), one intermediate wall (402), and a lid (403). A thermal interface material, TIM layer (50) is situated between the lid (403) and the first microelectronic component (20). A noise suppressing structure (60) is interposed between the TIM layer (50) and the first microelectronic component (20).

公开(公告)号：EP3008979B1

公开(公告)日：2017-05-03

申请号：EP14728590

申请日：2014-06-10

Applicant: THALES SA

Inventor： BONNET SÉBASTIEN ,  VERDEYME SERGE ,  CAMPOVECCHIO MICHEL ,  DRAVET ALAIN ,  LIENHART MARC-YVES

IPC: H05K1/02 ,  H05K3/46

CPC classification number: H05K1/0203 ,  H05K1/0204 ,  H05K1/0237 ,  H05K1/115 ,  H05K1/183 ,  H05K3/0011 ,  H05K3/40 ,  H05K3/4623 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/09072 ,  H05K2201/09845 ,  H05K2201/10416 ,  H05K2201/1056

公开(公告)号：EP2273862A4

公开(公告)日：2017-05-03

申请号：EP09735005

申请日：2009-04-21

Applicant: DAIKIN IND LTD

Inventor： ISHIZEKI SHINICHI ,  SATOU TOSHIAKI

IPC: H05K9/00 ,  H01L23/36 ,  H02M7/48 ,  H05K7/20

CPC classification number: H05K9/0022 ,  H01L2924/0002 ,  H02M1/44 ,  H02M5/4585 ,  H02M7/003 ,  H05K1/0203 ,  H05K1/0218 ,  H05K1/18 ,  H05K7/20909 ,  H05K2201/10151 ,  H05K2201/10371 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/1056 ,  H01L2924/00

Abstract: A first power module, a second power module, and a detection circuit are mounted on a printed circuit board. A heat sink is attached to surfaces of the power modules. An electromagnetic shielding member for shielding against electromagnetic waves from the heat sink side to the detection circuit side is provided between an attachment section of the detection circuit of the printed circuit board and a base of the heat sink.

Abstract translation: 第一电源模块，第二电源模块和检测电路安装在印刷电路板上。 散热器连接到功率模块的表面。 在印刷电路板的检测电路的安装部分和散热器的基座之间设置有用于屏蔽从散热器侧到检测电路侧的电磁波的电磁屏蔽部件。

公开(公告)号：EP2784808B8

公开(公告)日：2016-08-24

申请号：EP12851940.2

申请日：2012-10-18

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MINAMIO, Masanori ,  IKEUCHI, Hiroki

IPC: H01L23/29 ,  H01L23/31 ,  H05K1/03 ,  H05K3/46 ,  H01L23/498 ,  H01L23/427 ,  H01L23/433 ,  H01L23/495 ,  H05K1/02 ,  H05K3/28 ,  H01L23/00 ,  H05K1/18

CPC classification number: H05K1/0306 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/4275 ,  H01L23/4334 ,  H01L23/49537 ,  H01L23/49575 ,  H01L23/49822 ,  H01L23/49861 ,  H01L23/49894 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/0201 ,  H05K1/0203 ,  H05K1/0209 ,  H05K1/0224 ,  H05K1/0256 ,  H05K1/0373 ,  H05K1/186 ,  H05K3/284 ,  H05K3/285 ,  H05K3/4676 ,  H05K2201/0227 ,  H05K2201/0376 ,  H05K2201/0723 ,  H05K2201/1056 ,  H05K2201/10969 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device is a resin package structure including a semiconductor element T1 molded with a first resin 6. The first resin 6 contains a filler 7 including an electrical insulating capsule enclosed with a phase-change-material that absorbs ambient heat and phase-changes so as to increase a dielectric-strength. The effect of the filler 7 achieves a structure with satisfactory heat dissipation and a high withstand voltage.

公开(公告)号：EP2645416A1

公开(公告)日：2013-10-02

申请号：EP13158337.9

申请日：2013-03-08

Applicant: Fujitsu Limited

Inventor： Masuda, Satoshi

IPC: H01L23/498 ,  H01L23/66 ,  H01L25/065

CPC classification number: H01P3/02 ,  H01L23/047 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/66 ,  H01L25/0655 ,  H01L25/162 ,  H01L2223/6644 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2924/19107 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/0243 ,  H05K1/141 ,  H05K3/4697 ,  H05K2201/1056 ,  H01L2924/00014

Abstract: A stacked module includes a first multilayer substrate (6) including an opening (1X) having a stepwise wall face (1Y), andafirst transmissionline (18) including a first grounding conductor layer (17), a second multi layer substrate (2) supported on a stepped portion (1Z) of the stepwise wall face and including a second transmission line (15) including a second grounding conductor layer (14), a first chip (3) mounted on a bottom of the opening and coupled to a third transmission line (10) provided on the first multilayer substrate, and a second chip (4) mounted on the front face of the secondmultilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.

Abstract translation: 堆叠模块包括：第一多层基板（6），包括具有逐步壁面（1Y）的开口（1X）和包括第一接地导体层（17）的第一传输线（18），第二多层基板（2）被支撑 在所述阶梯式壁面的台阶部分（1Z）上并且包括第二传输线（15），所述第二传输线包括第二接地导体层（14），第一芯片（3）安装在所述开口的底部并且连接到第三传输 设置在第一多层基板上的线（10）和安装在第二多层基板的前表面上并耦合到第二传输线的第二芯片（4）。 第二接地导体层或与其连接的第四接地导体层露出的面接合到第一接地导体层或与其耦合的第三接地导体层露出的台阶部分，第一和第二接地导体 层耦合。

公开(公告)号：EP2619795A1

公开(公告)日：2013-07-31

申请号：EP11764639.8

申请日：2011-09-21

Applicant: ATI Technologies ULC ,  Advanced Micro Devices, Inc.

Inventor： REFAI-AHMED, Gamal ,  BLACK, Bryan ,  SU, Michael, Z.

IPC: H01L25/065 ,  H01L23/36

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0652 ,  H01L2023/4062 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81192 ,  H01L2224/83192 ,  H01L2224/92225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/01322 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15321 ,  H05K1/0204 ,  H05K1/141 ,  H05K1/181 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10416 ,  H05K2201/10515 ,  H05K2201/1056

Abstract: A method of manufacturing is provided that includes placing a thermal management device in thermal contact with a first semiconductor chip of a semiconductor chip device. The semiconductor chip device includes a first substrate coupled to the first semiconductor chip. The first substrate has a first aperture. At least one of the first semiconductor chip and the thermal management device is at least partially positioned in the first aperture.

公开(公告)号：EP2568784A2

公开(公告)日：2013-03-13

申请号：EP11194944.2

申请日：2011-12-21

Applicant: Primax Electronics Ltd

Inventor： Su, Chun-nan ,  Peng, Chun-Ching

IPC: H05K5/02

CPC classification number: H05K5/0278 ,  H01R13/6658 ,  H01R24/62 ,  H01R43/20 ,  H05K3/4015 ,  H05K2201/09754 ,  H05K2201/1028 ,  H05K2201/1056 ,  Y10T29/49139

Abstract: The present invention discloses a USB application device including a body, a circuit board, a plurality of first electrical pins and a plurality of electrical elements. The circuit board is disposed in the body. The plurality of first electrical pins are disposed on the circuit board and expended to the body such that the plurality of first electrical pins are partly exposed to the body. A space is formed between the plurality of first electrical pins and circuit board such that the plurality of electrical elements can be disposed on the space. The length of the circuit board therefore becomes shorter, and the volume of the USB application device is reduced.

Abstract translation: 本发明揭露一种USB应用装置，其包括主体，电路板，多个第一电性接脚以及多个电性元件。 电路板设置在主体中。 多个第一电引脚设置在电路板上并且扩展到主体，使得多个第一电引脚部分地暴露于主体。 在多个第一电引脚与电路板之间形成空间，使得多个电元件可以设置在该空间上。 因此电路板的长度变短，并且USB应用装置的体积减小。

公开(公告)号：EP2100702B1

公开(公告)日：2010-09-22

申请号：EP09003493.5

申请日：2009-03-10

Applicant: Makita Corporation

Inventor： Nishimiya, Takeshi ,  Matsunaga, Yutaka

IPC: B27C5/00 ,  H05K7/20

CPC classification number: H02K7/145 ,  B25F5/008 ,  H01L2924/0002 ,  H02K11/33 ,  H05K1/0203 ,  H05K7/20463 ,  H05K2201/10166 ,  H05K2201/10371 ,  H05K2201/1056 ,  H01L2924/00