公开(公告)号：EP4404271A1

公开(公告)日：2024-07-24

申请号：EP23215717.2

申请日：2023-12-12

Applicant: GlobalFoundries U.S. Inc.

Inventor： VANUKURU, Venkata Narayana Rao ,  SHANK, Steven M.

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L29/78 ,  H01L29/1087 ,  H01L29/0696 ,  H01L29/78654 ,  H01L27/1203 ,  H01L29/78615 ,  H01L21/84 ,  H01L29/78648

Abstract: Structures including a field-effect transistor and methods of forming a structure including a field-effect transistor are disclosed. The structure comprises a trench isolation region in a substrate, and a body contact region (28) that extends through the trench isolation region to the substrate. The structure further comprises a field-effect transistor including a gate connector (20), a first gate finger (18) that extends from the gate connector, a second gate finger (18) that extends from the gate connector, and a source/drain region (24, 26) disposed between the first gate finger and the second gate finger. The gate connector is positioned over the trench isolation region. The structure further comprises a gate contact (40) coupled to the gate connector, and a body contact (44) that penetrates through a portion of the gate connector to the body contact region (28).

公开(公告)号：EP4404245A2

公开(公告)日：2024-07-24

申请号：EP23202561.9

申请日：2023-10-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： RAGHUNATHAN, Uppili S. ,  JAIN, Vibhor ,  NGU, Yves T. ,  KANTAROVSKY, Johnatan A. ,  VENTRONE, Sebastian T.

IPC: H01L21/331 ,  H01L23/34 ,  H01L29/73 ,  H01L29/737 ,  H01L21/324 ,  H01L29/08 ,  H01L29/06

CPC classification number: H01L29/7371 ,  H01L29/7302 ,  H01L29/0821 ,  H01L29/66242 ,  H01L21/324 ,  H01L23/34 ,  H01L29/0649

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heater elements, methods of operation and methods of manufacture. The structure includes: an active device; a heater element under the active device and within a semiconductor substrate; and a contact to the heater element and the active device.

公开(公告)号：EP4401137A1

公开(公告)日：2024-07-17

申请号：EP23192846.6

申请日：2023-08-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Karalkar, Sagar Premnath ,  Gebreselasie, Ephrem G. ,  Krishnasamy, Rajendran ,  Gauthier, Robert J. ,  Mitra, Souvick

IPC: H01L27/02 ,  H02H9/04

CPC classification number: H01L27/0262 ,  H02H9/046 ,  H01L27/0259

Abstract: The disclosure provides a structure including an n-type well over an n-type deep well and between a pair of p-type wells for electrostatic discharge (ESD) protection. The structure may include a p-type deep well over a substrate, a first n-type well over the p-type deep well, and a pair of p-type wells over the p-type deep well. The pair of p-type wells are each adjacent opposite horizontal ends of the n-type well. A pair of second n-type wells are over the p-type deep well and adjacent one of the pair of p-type wells. Each p-type well is horizontally between the first n-type well and one of the second n-type wells.

公开(公告)号：EP4333042A3

公开(公告)日：2024-07-17

申请号：EP23186269.9

申请日：2023-07-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： SHARMA, Santosh ,  BENTLEY, Steven

IPC: H01L21/8252 ,  H01L27/06 ,  H01L27/085 ,  H01L29/10 ,  H01L29/20 ,  H01L29/40 ,  H01L29/778 ,  H01L29/66

CPC classification number: H01L27/085 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/7786 ,  H01L29/404 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a high-electron-mobility transistor and methods of manufacture. The structure includes: at least one depletion mode gate (21) on a conductive material over a semiconductor material (14); and at least one enhancement mode gate (19) electrically connected to the at least one depletion mode gate and over the semiconductor material.

公开(公告)号：EP4398296A1

公开(公告)日：2024-07-10

申请号：EP23202611.2

申请日：2023-10-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： Pandey, Shesh M. ,  Nath, Anindya ,  Loiseau, Alain F. ,  Mitra, Souvick ,  Tan, Chung F. ,  Holt, Judson R.

IPC: H01L23/525 ,  H01L23/34 ,  G11C17/16 ,  H01L27/06 ,  H10B20/00

CPC classification number: H01L23/5256 ,  H01L23/345 ,  H10B20/00 ,  G11C17/16 ,  H01L27/0629

Abstract: A structure includes: an electrically programmable fuse (e-fuse) including an anode and a cathode; at least one transistor positioned adjacent the e-fuse; and an electrically conductive interconnect coupling the cathode of the e-fuse to the at least one transistor, wherein the at least one transistor includes at least one semiconductor fin extending perpendicularly to the e-fuse.

公开(公告)号：EP4398010A1

公开(公告)日：2024-07-10

申请号：EP23204241.6

申请日：2023-10-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： PAWLAK, Bartlomiej Jan ,  RESTREPO, Oscar D. ,  RAMACHANDRAN, Koushik ,  BIAN, Yusheng ,  SILVA, Eduardo Cruz

IPC: G02B6/122 ,  G02B6/136 ,  G02B6/35

CPC classification number: G02B2006/1217620130101 ,  G02B2006/1213520130101 ,  G02B6/136 ,  G02B6/3566 ,  G02B6/3576 ,  G02B6/3596 ,  G02B6/3502 ,  G02B2006/1214520130101

Abstract: Structures including an edge coupler and methods of forming such structures. The structure comprises a dielectric layer on a semiconductor substrate. The dielectric layer includes a cavity and an edge defining a boundary of the cavity. The structure further comprises an edge coupler including a waveguide core. The waveguide core includes a portion that extends past the edge of the dielectric layer and overhangs the cavity. The structure further comprises a heater positioned adjacent to the portion of the waveguide core. The heater is spaced by a gap from the portion of the waveguide core.

公开(公告)号：EP4387102A1

公开(公告)日：2024-06-19

申请号：EP23198270.3

申请日：2023-09-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： Tran, Dzung T. ,  Pant, Deepti A. ,  Ahmed, Shibly S.

IPC: H03K19/003

CPC classification number: H03K19/00315

Abstract: Disclosed is an input buffer with hysteresis-integrated voltage protection devices for avoiding violations of maximum gate-to-source voltage limitations when the maximum input voltage is greater than the maximum gate-to-source voltage limitation. The input buffer includes a chain of transistors including two P-channel FETs (PFETs) and two N-channel FETs (NFETs). The data input to the input buffer controls the gates of the transistors in the chain so the data output from the input buffer at the junction between the PFETs and NFETs is inverted. The input buffer also includes a hysteresis feedback loop to prevent noise-induced switching of the output. The hysteresis feedback loop also includes voltage protection devices integrated therein to avoid maximum gate-to-source violations when the loop results in a hysteresis voltage being fed back into the chain at the source region of a transistor in the chain. Also disclosed is a receiver incorporating the input buffer.

公开(公告)号：EP4383345A1

公开(公告)日：2024-06-12

申请号：EP23206289.3

申请日：2023-10-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： SHARMA, Santosh ,  ZIERAK, Michael J. ,  BENTLEY, Steven J. ,  LEVY, Mark D.

IPC: H01L29/40 ,  H01L29/778 ,  H01L21/337 ,  H01L29/20 ,  H01L29/417

CPC classification number: H01L29/2003 ,  H01L29/1066 ,  H01L29/7786 ,  H01L29/404 ,  H01L29/41766 ,  H01L29/66462

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a high-electron-mobility transistor (HEMT) and methods of manufacture. The structure includes: a gate structure; a source contact and a drain contact adjacent to the gate structure; and a field plate electrically isolated from the gate structure and abutting the source contact and the drain contact.

公开(公告)号：EP4354733A3

公开(公告)日：2024-05-29

申请号：EP23196216.8

申请日：2023-09-08

Applicant: GlobalFoundries U.S. Inc.

Inventor： Sharma, Santosh

IPC: H03K17/16 ,  H03K17/687

CPC classification number: H03K17/162 ,  H03K17/165 ,  H03K17/163 ,  H03K17/168 ,  H03K17/6871 ,  H03K2017/687520130101

Abstract: Disclosed are circuits for controlling slew rate of a transistor during switching. Each circuit includes a first transistor (e.g., a gallium nitride (GaN)-based high electron mobility transistor (HEMT) or metal-insulator-semiconductor HEMT (MISHEMT)), a capacitor, and a second transistor. The first transistor includes a first gate connected to a pad for receiving a pulse-width modulation (PWM) signal, a first drain region connected to a first plate of the capacitor, and a first source region. The second transistor includes a second gate connected to a second plate of the capacitor, a second drain region, and a second source region and is connected to both the pad and the first transistor. The connection between the first and second transistors varies depending on whether the first transistor is an enhancement or depletion mode device and on whether the slew rate control is employed for on state or off state switching.

公开(公告)号：EP4372426A1

公开(公告)日：2024-05-22

申请号：EP23204511.2

申请日：2023-10-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： BIAN, Yusheng

IPC: G02B1/00 ,  G02B6/136

CPC classification number: G02B6/122 ,  G02B6/125 ,  G02B6/12004 ,  G02B1/002 ,  G02B6/136

Abstract: Structures for an optical component, such as a polarization splitter rotator, and methods of forming such structures. The structure comprises a waveguide core positioned in a vertical direction over a substrate, and a metamaterial structure positioned in a lateral direction adjacent to the waveguide core. The metamaterial structure including a plurality of elements separated by a plurality of gaps and a dielectric material in the plurality of gaps.