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    Surface mounting chip network component
    121.
    发明授权
    Surface mounting chip network component 有权
    表面安装芯片网络组件

    公开(公告)号：US07154373B2

    公开(公告)日：2006-12-26

    申请号：US10506947

    申请日：2002-03-25

    Applicant: Eiji Kobayashi

    Inventor： Eiji Kobayashi

    IPC: H01C1/01

    CPC classification number: H01G2/065 ,  H01C1/01 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/09781 ,  H05K2201/10045 ,  Y02P70/613

    Abstract: A surface mounting chip network component in which a network having three or more odd number of terminals are formed on the surface of an insulating substrate and Tomb Stone Phenomenon is suppressed. Even number of network circuits are formed on the surface of the insulating substrate (2) and the same number of terminals (1) are arranged, respectively, on the opposite sides of the insulating substrate (2). Alternatively, even number of network circuits are formed on the surface of the insulating substrate (2) and the terminals (1) are arranged on the side edges of the insulating substrate (2) point-symmetrically with respect to the center of the surface of the insulating substrate (2).

    Abstract translation: 在绝缘基板的表面上形成具有三个以上奇数个端子的网络的表面安装芯片网络部件被抑制。 在绝缘基板（2）的表面上形成有多个网络电路，并且在绝缘基板（2）的相对侧分别配置有相同数量的端子（1）。 或者，在绝缘基板（2）的表面上形成有多个网络电路，并且端子（1）相对于表面的中心点对称地配置在绝缘基板（2）的侧缘 绝缘基板（2）。

    Fixed network resistor
    123.
    发明申请
    Fixed network resistor 有权
    固定网络电阻

    公开(公告)号：US20050285713A1

    公开(公告)日：2005-12-29

    申请号：US10533035

    申请日：2003-10-28

    Applicant: Takahiro Kuriyama

    Inventor： Takahiro Kuriyama

    IPC: H01C1/16 ,  H01C13/02 ,  H05K3/34 ,  H01C1/02

    CPC classification number: H05K3/3442 ,  H01C1/16 ,  H01C13/02 ,  H05K2201/09172 ,  H05K2201/10045 ,  Y02P70/613

    Abstract: A fixed resistor network has an insulating substrate, a plurality of film resistors arranged on a top surface of the insulating substrate, terminal electrodes formed for the film resistors on each lengthwise sidewall of the insulating substrate at a given pitch along the sidewall, and recesses provided between the terminal electrodes. The occurrence of solder bridges between the terminal electrodes during solder mounting and the occurrence of chipping in the terminal-electrode-forming areas between the recesses on the lengthwise sidewall are both reduced by making the width of the recesses along the lengthwise sidewall either 0.44 to 0.48 times or 0.525 to 0.625 times the pitch.

    Abstract translation: 固定电阻网络具有绝缘基板，布置在绝缘基板的顶表面上的多个薄膜电阻器，沿着侧壁以给定的间距为绝缘基板的每个纵向侧壁上的薄膜电阻器形成的端子电极和设置的凹部 在端子电极之间。 在焊接安装期间在端子电极之间出现焊接桥，并且在纵向侧壁上的凹部之间的端子电极形成区域中发生切屑的情况都通过使沿着纵向侧壁的凹部的宽度为0.44至0.48 次或0.525到0.625倍。

    Multilayered LC composite component and method for manufacturing the same
    125.
    发明授权
    Multilayered LC composite component and method for manufacturing the same 有权
    多层LC复合材料及其制造方法

    公开(公告)号：US06727782B2

    公开(公告)日：2004-04-27

    申请号：US10192155

    申请日：2002-07-11

    Applicant: Tomohiro Sasaki ,  Takahiro Azuma ,  Shigekatsu Yamamoto

    Inventor： Tomohiro Sasaki ,  Takahiro Azuma ,  Shigekatsu Yamamoto

    IPC: H03H701

    CPC classification number: H03H7/0115 ,  H03H2001/0085 ,  H05K1/0243 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/09954 ,  H05K2201/10045 ,  Y02P70/613

    Abstract: A multilayered LC composite component includes a main body having a pair of side surfaces, a pair of end surfaces, and an upper surface and a lower surface. Ground-side terminal electrodes are disposed at the center of the side surfaces and hot-side terminal electrodes are disposed along edges of the side surfaces. Each of the hot-side terminal electrodes includes an end surface extended portion extending to each of the end surfaces. The end-surface extended portion is arranged so that at least the approximate center of each of the end surfaces is exposed.

    Abstract translation: 多层LC复合部件包括具有一对侧面，一对端面以及上表面和下表面的主体。 接地侧端子电极设置在侧面的中心，热侧端子电极沿着侧面的边缘设置。 每个热侧端子电极包括延伸到每个端面的端面延伸部分。 端面延伸部分被布置成使得至少每个端面的大致中心被露出。

    Surface mount multilayer capacitor
    127.
    发明授权
    Surface mount multilayer capacitor 有权
    表面贴装多层电容器

    公开(公告)号：US06243253B1

    公开(公告)日：2001-06-05

    申请号：US09264124

    申请日：1999-03-08

    Applicant: David A. DuPre ,  John L. Galvagni ,  Andrew P. Ritter

    Inventor： David A. DuPre ,  John L. Galvagni ,  Andrew P. Ritter

    IPC: H01G4228

    CPC classification number: H01G2/065 ,  H01G4/30 ,  H05K1/0216 ,  H05K1/0231 ,  H05K1/112 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/0979 ,  H05K2201/10045 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

    Abstract: A multilayer ceramic device suitable for use in surface mount decoupling applications may have a single capacitor or a capacitor array. The device has a capacitor body defining a plurality of electrical terminals on an outer surface thereof. The terminals are interdigitated such that a respective first polarity terminal will be adjacent to a respective second polarity terminal (and vice versa). The capacitor body contains a plurality of interleaved capacitor plates in opposed and spaced apart relation. Capacitor plates of the first polarity are electrically connected to respective first polarity terminals via a plurality of lead structures. Likewise, a plurality of lead structures electrically connect capacitor plates of the second polarity to respective second polarity terminals.

    Abstract translation: 适用于表面贴装去耦应用的多层陶瓷器件可以具有单个电容器或电容器阵列。 该装置具有在其外表面上限定多个电端子的电容器主体。 端子相互交错，使得相应的第一极性端子将与相应的第二极性端子相邻（反之亦然）。 电容器主体包含相互间隔开的多个交错电容器板。 第一极性的电容器板经由多个引线结构电连接到相应的第一极性端子。 同样地，多个引线结构将第二极性的电容器板电连接到相应的第二极性端子。

    Multilayer ceramic package with low-variance embedded resistors
    128.
    发明授权
    Multilayer ceramic package with low-variance embedded resistors 失效
    具有低方位嵌入式电阻器的多层陶瓷封装

    公开(公告)号：US6100787A

    公开(公告)日：2000-08-08

    申请号：US864300

    申请日：1997-05-28

    Applicant: Rong-Fong Huang ,  Robert A. Burr

    Inventor： Rong-Fong Huang ,  Robert A. Burr

    IPC: H01C13/02 ,  H01L23/538 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16 ,  H05K3/46 ,  H01C7/18

    CPC classification number: H01C13/02 ,  H01L23/5383 ,  H05K1/167 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/09672 ,  H05K2201/10045 ,  H05K2203/1453 ,  H05K3/4611 ,  H05K3/4629

    Abstract: A multilayer electronic component (200) is provided. The component includes a substrate package assembly (202) with a set of stacked insulated sheets of a dielectric ceramic material (204, 206, 208, 210, 212). Also included are a set of embedded resistors (214), each of the embedded resistors including an electrical input port pad (216) and an electrical output port pad (218) provided in layers between the set of stacked insulated sheets. Each of the insulated sheets has a trough (220) of a predetermined length aligned between and transverse to the electrical input port pad (216) and the electrical output port pad (218). The trough (220) reduces the resistance value variability in the multilayer electronic component (200). The trough (220) is substantially filled with a resistive paste material and an internal circuit (222) connects the embedded resistors inside the substrate package assembly (202). A method of forming the substrate package assembly (202) is also provided.

    Abstract translation: 提供了一种多层电子部件（200）。 该组件包括具有介电陶瓷材料（204,206,208,210,212）的一组堆叠的绝缘片的衬底封装组件（202）。 还包括一组嵌入式电阻器（214），每个嵌入式电阻器包括设置在该组堆叠绝缘片材之间的层中的电输入端口衬垫（216）和电输出端口衬垫（218）。 每个绝缘片具有在电输入端口衬垫（216）和电输出端口衬垫（218）之间并且横向于电输入端口衬垫（216）并且横向于电输入端口衬垫（216）的预定长度的槽（220）。 槽（220）降低了多层电子部件（200）中的电阻值变化。 槽（220）基本上被电阻浆料材料填充，并且内部电路（222）连接衬底封装组件（202）内的嵌入式电阻器。 还提供了一种形成衬底封装组件（202）的方法。

    Thermally matched electronic components
    130.
    发明授权
    Thermally matched electronic components 失效
    热电偶配件

    公开(公告)号：US5506754A

    公开(公告)日：1996-04-09

    申请号：US267535

    申请日：1994-06-29

    Applicant: Mark Brooks ,  Gary Seibel

    Inventor： Mark Brooks ,  Gary Seibel

    IPC: H05K1/02 ,  H05K1/14 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K7/20

    CPC classification number: H05K3/368 ,  H05K1/141 ,  H05K3/3442 ,  H05K1/023 ,  H05K2201/068 ,  H05K2201/09181 ,  H05K2201/09572 ,  H05K2201/10022 ,  H05K2201/10045 ,  H05K2201/10636 ,  H05K2201/10984 ,  H05K2201/10992 ,  H05K3/28 ,  Y02P70/611 ,  Y02P70/613

    Abstract: Discrete circuit devices constructed on a component substrate thermally matched to the supporting substrate of a higher level circuit assembly. Upon securing each component to the supporting substrate of a higher level circuit assembly, a connection subject to reduced thermal stress is obtained. In the construction of an exemplary surface mount, hybrid component containing resistors and capacitors, a component substrate of a polyimide impregnated material is populated with a repeating matrix of chip capacitors and chip resistors, which are adhesively bound and soldered to selected termination pads containing high temperature solder filled through vias. The substrate is epoxy encapsulated and then diced at selected ones of the through vias into multiple components. Each thermally matched component is resoldered at the separated vias to obtain surface mount terminations. Portions of the vias may be exposed through the component sidewall to permit circuit test. Other, exemplary thermally matched components, constructed of multi-layer resin or ceramic substrates are also disclosed and wherein external termination pads are concentrated to the center of the component. Alternative, thermally matched transmission lines and resistor network circuits are also disclosed.

    Abstract translation: 构造在与上层电路组件的支撑衬底热匹配的部件衬底上的分立电路器件。 在将每个部件固定到较高级别的电路组件的支撑基板上时，获得了受热应力降低的连接。 在示例性表面安装的构造中，包含电阻器和电容器的混合元件，聚酰亚胺浸渍材料的部件衬底填充有片状电容器和片状电阻器的重复矩阵，其被粘合地结合并焊接到包含高温的选定的端接焊盘 焊料填充通孔。 衬底被环氧树脂封装，然后在选择的通孔中切成多个成分。 每个热匹配组件在分离的通孔处被转化，以获得表面贴装终端。 通孔的一部分可以通过部件侧壁暴露以允许电路测试。 还公开了由多层树脂或陶瓷基板构成的其它示例性热匹配部件，并且其中外部端接焊盘被集中到部件的中心。 还公开了替代的热匹配传输线路和电阻器网络电路。

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