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公开(公告)号：US20160167959A1
公开(公告)日：2016-06-16
申请号：US15048106
申请日：2016-02-19
Applicant: Raytheon Company
Inventor： Adam M. Kennedy , Buu Q. Diep , Stephen H. Black , Tse E. Wong , Thomas Allan Kocian , Gregory D. Tracy
IPC: B81C1/00
CPC classification number: B81C1/00333 , B81B7/0048 , B81B7/0051 , B81B2201/0207 , B81C1/00825 , B81C2203/035
Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
Abstract translation: 密封包装，其具有设置在晶片结构上的装置和骨架到装置晶片上的盖结构。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。
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142.发明申请公开(公告)号：US20160167954A1
公开(公告)日：2016-06-16
申请号：US15050388
申请日：2016-02-22
Applicant: Versana Micro Inc
Inventor： BISHNU PRASANNA GOGOI
IPC: B81B7/02
CPC classification number: B81B7/02 , B81B2201/0207 , B81B2201/0214 , B81B2201/0228 , B81B2201/0257 , B81B2201/0264 , B81B2201/0278 , B81B2207/012 , B81B2207/05 , B81B2207/09 , H01L27/14 , H01L27/16 , H01L27/22 , H01L41/1132 , H01L41/1138 , H01L2924/00 , H05K7/02
Abstract: A monolithically integrated multi-sensor (MIMS) is disclosed. A MIMs integrated circuit comprises a plurality of sensors. For example, the integrated circuit can comprise three or more sensors where each sensor measures a different parameter. The three or more sensors can share one or more layers to form each sensor structure. In one embodiment, the three or more sensors can comprise MEMs sensor structures. Examples of the sensors that can be formed on a MIMs integrated circuit are an inertial sensor, a pressure sensor, a tactile sensor, a humidity sensor, a temperature sensor, a microphone, a force sensor, a load sensor, a magnetic sensor, a flow sensor, a light sensor, an electric field sensor, an electrical impedance sensor, a galvanic skin response sensor, a chemical sensor, a gas sensor, a liquid sensor, a solids sensor, and a biological sensor.
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公开(公告)号：US09334154B2
公开(公告)日：2016-05-10
申请号：US14456476
申请日：2014-08-11
Applicant: Raytheon Company
Inventor： Adam M. Kennedy , Buu Q. Diep , Stephen H. Black , Tse E. Wong , Thomas Allan Kocian , Gregory D. Tracy
IPC: H01L23/552 , B81B7/00
CPC classification number: B81C1/00333 , B81B7/0048 , B81B7/0051 , B81B2201/0207 , B81C1/00825 , B81C2203/035
Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
Abstract translation: 密封包装，其具有设置在晶片结构上的装置和骨架到装置晶片上的盖结构。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。
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公开(公告)号：US20160039665A1
公开(公告)日：2016-02-11
申请号：US14456476
申请日：2014-08-11
Applicant: Raytheon Company
Inventor： Adam M. Kennedy , Buu Q. Diep , Stephen H. Black , Tse E. Wong , Thomas Allan Kocian , Gregory D. Tracy
IPC: B81B7/00
CPC classification number: B81C1/00333 , B81B7/0048 , B81B7/0051 , B81B2201/0207 , B81C1/00825 , B81C2203/035
Abstract: A sealed package having a device disposed on a wafer structure and slid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.
Abstract translation: 一种密封包装，其具有设置在晶片结构上的装置并且被结合到装置晶片上。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。
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公开(公告)号：US09199838B2
公开(公告)日：2015-12-01
申请号：US14504749
申请日：2014-10-02
Applicant: Robert Bosch GmbH
Inventor： Gary O'Brien , Fabian Purkl , Ando Feyh , Bongsang Kim , Ashwin K Samarao , Thomas Rocznik , Gary Yama
CPC classification number: B81B7/0019 , B81B7/02 , B81B2201/0207 , B81B2207/11 , G01J5/024 , G01J5/0245 , G01J5/0853 , G01J5/20 , G02F2201/083 , H01L2924/1461 , Y10T29/4913
Abstract: In one embodiment, A MEMS sensor assembly includes a substrate, a first sensor supported by the substrate and including a first absorber spaced apart from the substrate, and a second sensor supported by the substrate and including (i) a second absorber spaced apart from the substrate, and (ii) at least one thermal shorting portion integrally formed with the second absorber and extending downwardly from the second absorber to the substrate thereby thermally shorting the second absorber to the substrate.
Abstract translation: 在一个实施例中，MEMS传感器组件包括衬底，由衬底支撑并包括与衬底间隔开的第一吸收体的第一传感器和由衬底支撑的第二传感器，并且包括（i）与第二吸收体间隔开的第二吸收体 衬底，和（ii）与第二吸收体一体地形成并从第二吸收体向下延伸到衬底的至少一个热短路部分，从而将第二吸收体热短路到衬底。
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Patent Agency Ranking
公开(公告)号：US20150279755A1
公开(公告)日：2015-10-01
申请号：US14736042
申请日：2015-06-10
Applicant: RAYTHEON COMPANY
Inventor： Roland W. Gooch , Buu Q. Diep , Adam M. Kennedy , Stephen H. Black , Thomas A. Kocian
CPC classification number: H01L23/10 , B81B7/0038 , B81B2201/0207 , B81C1/00269 , B81C2203/035 , H01L21/52 , H01L21/76841 , H01L23/26 , H01L23/49866 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14683 , H01L27/1469 , H01L2224/16 , H01L2924/0002 , H01L2924/00
Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
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公开(公告)号：US09093444B2
公开(公告)日：2015-07-28
申请号：US13939400
申请日：2013-07-11
Applicant: Raytheon Company
Inventor： Roland W. Gooch , Buu Q. Diep , Adam M. Kennedy , Stephen H. Black , Thomas Allan Kocian
IPC: H01L23/48 , H01L23/544 , H01L23/02 , H01L23/06 , H01L23/498 , H01L21/768 , B81B7/00 , B81C1/00 , H01L23/26 , H01L27/146
CPC classification number: H01L23/10 , B81B7/0038 , B81B2201/0207 , B81C1/00269 , B81C2203/035 , H01L21/52 , H01L21/76841 , H01L23/26 , H01L23/49866 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/14683 , H01L27/1469 , H01L2224/16 , H01L2924/0002 , H01L2924/00
Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
Abstract translation: 电子装置及其制造方法。 一种或多种方法可以包括提供具有空腔和围绕空腔的表面的盖晶片和具有检测器装置和参考装置的装置晶片。 在某些实例中，可以将钛材料的阻焊层沉积到盖晶片的表面上。 可以进一步激活钛材料的阻焊层作为吸气剂。 在各种示例中，盖晶片和器件晶片可以使用焊料接合在一起，并且钛材料的阻焊层可以防止焊料接触盖晶片的表面。
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公开(公告)号：US20140306312A1
公开(公告)日：2014-10-16
申请号：US14357046
申请日：2012-11-09
Applicant: U Electronics Co., Ltd.
Inventor： Yong Hee Han , Hyung Won Kim , Mi Sook Ahn
CPC classification number: B81B7/0038 , B81B7/007 , B81B2201/0207 , B81B2201/0235 , B81B2201/0242 , B81B2207/096 , B81C1/00269 , B81C1/00285 , B81C2203/0118 , G01P15/0802 , H01L31/02016 , H01L2224/291 , H01L2924/014
Abstract: A micro electro mechanical systems (MEMS sensor packaging includes a first wafer having a readout integrated circuit (ROIC) formed thereon., a second wafer disposed corresponding to the first wafer and having a concave portion on one side thereof and a MEMS sensor prepared on the concave portion, joint solders formed along a surrounding of the MEMS sensor and sealing the MEMS sensor jointing the first and second wafers, and pad solders formed to electrically connect the ROIC circuit of the first wafer and the MEMS sensor of the second wafer. According to the present disclosure, in joining and packaging a wafer having the ROIC formed thereon and a wafer having the MEMS sensor formed thereon, the size of a package can be reduced and an electric signal can be stably provided by forming internally pad solders for electrically connecting the ROIC and the MEMS sensor.
Abstract translation: 微电子机械系统（MEMS传感器封装包括其上形成有读出集成电路（ROIC）的第一晶片），与第一晶片相对设置并且在其一侧具有凹部的第二晶片和在其上制备的MEMS传感器 凹部，沿着MEMS传感器的周围形成的接合焊料，并密封连接第一和第二晶片的MEMS传感器，以及形成为将第一晶片的ROIC电路电连接到第二晶片的MEMS传感器的焊盘焊接，根据 本公开内容中，在其上形成有ROIC的晶片和其上形成有MEMS传感器的晶片的接合和封装中，可以减小封装的尺寸，并且可以通过形成用于电连接的内部焊盘焊料来稳定地提供电信号 ROIC和MEMS传感器。
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公开(公告)号：US20130234270A1
公开(公告)日：2013-09-12
申请号：US13415479
申请日：2012-03-08
Applicant: Gary Yama , Fabian Purkl , Matthieu Liger , Matthias Illing
Inventor： Gary Yama , Fabian Purkl , Matthieu Liger , Matthias Illing
CPC classification number: B81C1/00039 , B81B3/007 , B81B2201/0207 , B81B2203/0307 , B81C2201/0181 , G01J5/023 , H01L27/14649 , H01L27/14683
Abstract: In one embodiment, a method of forming a semiconductor device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a first trench in the sacrificial layer, forming a first sidewall layer with a thickness of less than about 50 nm on a first sidewall of the first trench using atomic layer deposition (ALD), and removing the sacrificial layer.
Abstract translation: 在一个实施例中，形成半导体器件的方法包括提供衬底，在衬底层上形成牺牲层，在牺牲层中形成第一沟槽，形成厚度小于约50nm的第一侧壁层 使用原子层沉积（ALD）的第一沟槽的第一侧壁，以及去除牺牲层。
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150.发明申请公开(公告)号：US20130221455A1
公开(公告)日：2013-08-29
申请号：US13405513
申请日：2012-02-27
Applicant: Christopher D. Manack , Frank Stepniak , Sreenivasan K. Koduri
Inventor： Christopher D. Manack , Frank Stepniak , Sreenivasan K. Koduri
CPC classification number: B81C1/00246 , B81B7/0067 , B81B2201/0207 , B81C1/00269 , G01J5/045 , G01J5/12 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/24245 , H01L2224/32245 , H01L2224/82039 , H01L2224/92144 , H01L2224/97 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/12042 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/00 , H01L2224/83 , H01L2224/82
Abstract: An embedded micro-electro-mechanical system (MEMS) (100) comprising a semiconductor chip (101) embedded in an insulating board (120), the chip having a cavity (102) including a radiation sensor MEMS (105), the opening (104) of the cavity at the chip surface covered by a plate (110) transmissive to the radiation (150) sensed by the MEMS. The plate surface remote from the cavity having a bare central area, to be exposed to the radiation sensed by the MEMS in the cavity, and a peripheral area covered by a metal film (111) touching the plate surface and a layer (112) of adhesive stacked on the metal film.
Abstract translation: 一种嵌入式微电子机械系统（MEMS）（100），包括嵌入在绝缘板（120）中的半导体芯片（101），所述芯片具有包括辐射传感器MEMS（105）的空腔（102），所述开口 在由芯片感测到的辐射（150）透射的板（110）覆盖的芯片表面处的腔的空腔（104）。 离开空腔的板表面具有裸露的中心区域，以暴露于由空腔内的MEMS感测的辐射，以及由接触板表面的金属膜（111）覆盖的周边区域和覆盖板（112）的层 粘合剂堆叠在金属膜上。
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