公开(公告)号：US20130341772A1

公开(公告)日：2013-12-26

申请号：US13533655

申请日：2012-06-26

Applicant: Harold Ryan Chase ,  Mihir K. Rov ,  Mathew J. Manusharow ,  Mark Hlad

Inventor： Harold Ryan Chase ,  Mihir K. Rov ,  Mathew J. Manusharow ,  Mark Hlad

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/288 ,  H01L21/76838 ,  H01L23/00 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/4602 ,  H05K2201/09581 ,  H01L2924/014

Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

Abstract translation: 示出了基板，半导体器件和方法的实施例，其包括用于改善传导的细长结构。 还示出了延伸的结构和方法，其提供电磁隔离以减少相邻部件中的噪声。

公开(公告)号：US20130328214A1

公开(公告)日：2013-12-12

申请号：US13966633

申请日：2013-08-14

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

Abstract translation: 一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层 在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置 在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间， 相对于基板的中心位置。

公开(公告)号：US08153908B2

公开(公告)日：2012-04-10

申请号：US12173371

申请日：2008-07-15

Applicant: Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

Inventor： Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K9/00 ,  H05K3/38 ,  H05K3/429 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4691 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2201/09809 ,  H05K2201/2072 ,  Y10T29/49155

Abstract: The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.

Abstract translation: 即使基部构件和电缆层的热膨胀系数明显不同，电路板也能够将基座构件上的电缆层紧密接合。 电路板包括：基座部件; 并且电缆层被层压在具有锚定图案的基底构件上，锚定图案是形成在基底构件的表面上的导电层。

公开(公告)号：US20110232953A1

公开(公告)日：2011-09-29

申请号：US13074144

申请日：2011-03-29

Applicant: Takeshi Oga ,  Katsura Hayashi

Inventor： Takeshi Oga ,  Katsura Hayashi

IPC: H05K1/02

CPC classification number: H05K3/4602 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/427 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/029 ,  H05K2201/0769 ,  H05K2201/09481 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2201/2072

Abstract: According to one embodiment of the invention, a circuit board comprises an insulating layer including a resin material, a plurality of inorganic insulating particles, and a penetrating hole. The circuit board further comprises a penetrating conductor disposed in the penetrating hole. The insulating layer includes a resin insulating portion having the plurality of inorganic insulating particles dispersed in the resin material. The insulating layer further includes an inorganic insulating portion interposed between the resin insulating portion and the penetrating conductor and made of the same material as the plurality of inorganic insulating particles.

Abstract translation: 根据本发明的一个实施例，电路板包括包括树脂材料，多个无机绝缘颗粒和穿透孔的绝缘层。 电路板还包括布置在穿透孔中的穿透导体。 绝缘层包括具有分散在树脂材料中的多个无机绝缘粒子的树脂绝缘部分。 绝缘层还包括介于树脂绝缘部分和穿透导体之间并由与多个无机绝缘颗粒相同的材料制成的无机绝缘部分。

公开(公告)号：US20110056740A1

公开(公告)日：2011-03-10

申请号：US12875644

申请日：2010-09-03

Applicant: Takamasa Takano

Inventor： Takamasa Takano

IPC: H05K1/11 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A through-hole electrode substrate includes a substrate including a plurality of through-holes, a plurality of through-hole electrodes arranged within each of the plurality of through-holes, and a first insulation layer arranged on one surface of the substrate, wherein the first insulation layer includes a plurality of first openings which expose each of the plurality of through-holes, the plurality of through-holes includes a leaning through-hole leaning from one surface to the other surface of the substrate, and each of the plurality of first openings is arranged to match an open position of the leaning through-hole.

Abstract translation: 通孔电极基板包括具有多个通孔的基板，配置在多个贯通孔的每一个内的多个通孔电极以及设置在基板的一个面上的第一绝缘层， 第一绝缘层包括暴露多个通孔中的每一个的多个第一开口，多个通孔包括从衬底的一个表面到另一个表面倾斜的倾斜通孔，并且多个 布置第一开口以匹配倾斜通孔的打开位置。

公开(公告)号：US07812702B2

公开(公告)日：2010-10-12

申请号：US12466940

申请日：2009-05-15

Applicant: Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

Inventor： Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

IPC: H01F5/00

CPC classification number: H05K3/4046 ,  H01F17/0006 ,  H01F17/06 ,  H01F41/046 ,  H01F2017/002 ,  H01F2017/065 ,  H01L23/645 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0233 ,  H05K1/115 ,  H05K1/185 ,  H05K3/42 ,  H05K3/4602 ,  H05K2201/086 ,  H05K2201/09581 ,  Y10T29/4902 ,  H01L2224/05599

Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.

Abstract translation: 嵌入印刷电路板的电感器包括沿着印刷电路板的厚度方向延伸的导体和与导体接触而不间隙的磁体。 例如，磁性体由具有圆柱形管状的铁氧体构成。 导体由在圆筒形管状铁氧体的内周面上电镀形成的铜膜构成。 电感器沿印刷电路板的厚度方向插入。

公开(公告)号：US07767252B2

公开(公告)日：2010-08-03

申请号：US11222851

申请日：2005-09-12

Applicant: Tsuyoshi Shintate ,  Kazuaki Sakurada ,  Jun Yamada

Inventor： Tsuyoshi Shintate ,  Kazuaki Sakurada ,  Jun Yamada

IPC: H01L21/20

CPC classification number: H05K3/4664 ,  H01L51/0004 ,  H05K3/125 ,  H05K2201/09581 ,  H05K2201/09909 ,  H05K2203/013 ,  H05K2203/1173 ,  H05K2203/1476

Abstract: A droplet discharge apparatus is used in a multilayer structure forming method of the invention. The multilayer structure forming method includes: discharging droplets of a first conductive material to form a first conductive material pattern on a surface of an object; baking the first conductive material pattern to form a wiring pattern; discharging droplets of a first insulating material including a first photo-curable material to form a first insulating material pattern bordering via holes on the wiring pattern; curing the first insulating material pattern to form a first insulating pattern bordering the via holes; making the surface of the object lyophilic; discharging droplets of a second insulating material including a second photo-curable material to form a second insulating material pattern that covers the wiring pattern and the surface of the object which has been made lyophilic, and surrounds the first insulating pattern; and curing the second insulating material pattern to form a second insulating pattern that surrounds the first insulating pattern. In addition, preferably, the first conductive material includes silver (Ag) nanoparticles.

Abstract translation: 液滴喷射装置用于本发明的多层结构形成方法中。 多层结构形成方法包括：排出第一导电材料的液滴以在物体的表面上形成第一导电材料图案; 烘烤第一导电材料图案以形成布线图案; 排出包括第一可光固化材料的第一绝缘材料的液滴，以形成与布线图案上的通孔邻接的第一绝缘材料图案; 固化第一绝缘材料图案以形成与通孔相邻的第一绝缘图案; 使物体的表面亲液; 排出包含第二可光固化材料的第二绝缘材料的液滴，以形成覆盖所述布线图形和所述物体表面的第二绝缘材料图案，所述第二绝缘材料图案已经被制成亲液性，并围绕所述第一绝缘图案; 以及固化所述第二绝缘材料图案以形成围绕所述第一绝缘图案的第二绝缘图案。 此外，优选地，第一导电材料包括银（Ag）纳米颗粒。

公开(公告)号：US20100159193A1

公开(公告)日：2010-06-24

申请号：US12338283

申请日：2008-12-18

Applicant: Michael Y. Young ,  Patrick C. Cheung ,  Stephen David White ,  John R. Andrews ,  David J. Gervasi

Inventor： Michael Y. Young ,  Patrick C. Cheung ,  Stephen David White ,  John R. Andrews ,  David J. Gervasi

IPC: B32B3/24

CPC classification number: B41J2/14233 ,  H05K1/0272 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/429 ,  H05K2201/0179 ,  H05K2201/09581 ,  H05K2201/09809 ,  H05K2203/0315 ,  Y10T428/24322

Abstract: A via structure configured for electrical and fluidic interconnection, and including an electrically conductive layer and an electrically insulating layer disposed on the electrically conductive layer.

Abstract translation: 导电结构，其被配置用于电和流体互连，并且包括设置在所述导电层上的导电层和电绝缘层。

公开(公告)号：US20100096750A1

公开(公告)日：2010-04-22

申请号：US12289122

申请日：2008-10-21

Applicant: Chao-Wen Shih ,  Ying-Chih Chan

Inventor： Chao-Wen Shih ,  Ying-Chih Chan

IPC: H01L23/52

CPC classification number: H01L23/49816 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K3/0023 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/4007 ,  H05K3/421 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/09563 ,  H05K2201/09581 ,  H01L2924/00

Abstract: A packaging substrate is disclosed, which comprises: a substrate body, wherein a surface thereof has a plurality of conductive pads and a solder mask disposed on the surface and having a plurality of openings to expose the conductive pads; dielectric rings disposed on the inner walls of the openings and extending to parts of the surface of the solder mask surrounding the openings; and metal bumps disposed in the openings and on the conductive pads exposed thereby, and combined with the dielectric rings.

Abstract translation: 公开了一种封装基板，其包括：基板主体，其表面具有多个导电焊盘和布置在该表面上的焊接掩模，并且具有多个开口以暴露导电焊盘; 介质环设置在开口的内壁上并延伸到围绕开口的焊料掩模表面的一部分; 以及金属凸块，其设置在开口中和由此暴露的导电焊盘上，并与介质环组合。

公开(公告)号：US07535106B2

公开(公告)日：2009-05-19

申请号：US11657280

申请日：2007-01-24

Applicant: Osamu Shiono ,  Takao Ishikawa ,  Takashi Namekawa ,  Yasutaka Suzuki ,  Takashi Naito ,  Hiroki Yamamoto ,  Daigorou Kamoto ,  Ken Takahashi ,  Tadanori Segawa ,  Toshiya Satoh ,  Takao Miwa ,  Shigehisa Motowaki

Inventor： Osamu Shiono ,  Takao Ishikawa ,  Takashi Namekawa ,  Yasutaka Suzuki ,  Takashi Naito ,  Hiroki Yamamoto ,  Daigorou Kamoto ,  Ken Takahashi ,  Tadanori Segawa ,  Toshiya Satoh ,  Takao Miwa ,  Shigehisa Motowaki

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/4061 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49883 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49175 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01063 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/426 ,  H05K2201/0116 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/09827 ,  H05K2201/09981 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wiring glass substrate includes a glass substrate formed of glass and having a plurality of holes formed at predetermined positions, bumps so formed as to be connected to a conductive material filling the holes and wirings formed on a surface opposite to a surface having the bumps formed thereon and electrically connecting a plurality of connection terminals arranged in intervals different from intervals of the holes to the conductive material. The shape of the conductive material is porous and porous electrodes are bonded to the inner wall surfaces of the holes by an anchor effect to increase the strength of the glass substrate.

Abstract translation: 布线玻璃基板包括由玻璃形成的玻璃基板，在预定位置形成有多个孔，凸起形成为与填充孔的导电材料连接，形成在与形成有凸点的表面相对的表面上的布线 并且将与间隔不同的间隔布置的多个连接端子电连接到导电材料上。 导电材料的形状是多孔的，并且多孔电极通过锚固效应结合到孔的内壁表面，以增加玻璃基底的强度。