公开(公告)号：WO1990007857A1

公开(公告)日：1990-07-12

申请号：PCT/JP1986000386

申请日：1986-07-22

Applicant: ENDOH, Satoru ,  OHNISHI, Katsuya;

IPC: H05K01/05

CPC classification number: H05K3/0061 ,  H05K1/0393 ,  H05K1/056 ,  H05K3/321 ,  H05K3/386 ,  H05K3/4092 ,  H05K3/4623 ,  H05K3/4635 ,  H05K3/4641 ,  H05K2201/056 ,  H05K2201/0919 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09754 ,  H05K2201/10924

Abstract: A metal core printed wiring board in which a large number of lead terminal such as of an IC or an LSI are formed by etching or the like method at an edge of at least one end of a conductive substrate that serves as a core, the core and the terminals are bonded together with an insulating bonding material maintaining electrical insulation, a conductive circuit pattern is formed directly on the surface of the insulating bonding material, or a printed board on which the wiring has been printed is adhered onto the surface of the insulating bonding material, in order to increase the density of mounting, to facilitate the connection to other circuit substrates such as mother boards, and to decrease the volume of circuit.

Abstract translation: 在作为核心的导电性基材的至少一端的边缘，通过蚀刻或类似方法形成诸如IC或LSI等大量引线端子的金属芯印刷电路板，芯 并且端子通过保持电绝缘的绝缘接合材料接合在一起，直接在绝缘接合材料的表面上形成导电电路图案，或者已经印刷有布线的印刷电路板粘附到绝缘体的表面上 接合材料，以增加安装密度，以便于连接到诸如母板的其它电路基板，并且减小电路的体积。

公开(公告)号：EP2798920B1

公开(公告)日：2016-03-23

申请号：EP12816431.6

申请日：2012-12-28

Applicant: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： KARPOVYCH, Volodymyr ,  STAHR, Johannes

IPC: H05K3/36 ,  H05K1/14 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/4611 ,  H05K1/11 ,  H05K1/142 ,  H05K1/18 ,  H05K3/368 ,  H05K3/403 ,  H05K3/4694 ,  H05K2201/09045 ,  H05K2201/0919 ,  H05K2201/09572 ,  H05K2201/1059 ,  H05K2201/209 ,  Y10T29/49126

公开(公告)号：EP2782133A2

公开(公告)日：2014-09-24

申请号：EP13195878.7

申请日：2013-12-05

Applicant: FUJITSU LIMITED

Inventor： Masuda, Satoshi

IPC: H01L23/66 ,  H01L25/16 ,  H01L23/047

CPC classification number: H05K7/026 ,  H01L23/045 ,  H01L23/047 ,  H01L23/3677 ,  H01L23/49833 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/06181 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2924/00014 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/19107 ,  H05K1/0204 ,  H05K1/021 ,  H05K1/0215 ,  H05K3/4697 ,  H05K7/20509 ,  H05K9/0039 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/10242 ,  H05K2201/10371 ,  H05K2201/1056 ,  H01L2224/45099

Abstract: A high-frequency module includes a lower base member having a recess part formed in an upper face thereof, and having a base metal part formed on a lower face thereof that is to be grounded, an upper substrate disposed inside the recess part of the lower base member, a semiconductor device mounted on an upper face of the upper substrate, a first ground line connected to the semiconductor device and formed on the upper substrate, and a ground metal part connected to the base metal part and disposed in the lower base member, wherein the ground metal part is connected to the first ground line on the upper substrate.

Abstract translation: 本发明提供一种高频模块，其特征在于，具备：下部基体部件，其上表面形成有凹部，在其下面形成有接地的基体金属部;上部基板，其配置在下部凹部的内侧 基部构件，安装在上基板的上表面上的半导体器件，连接到半导体器件并形成在上基板上的第一接地线以及连接到基部金属部并设置在下基部构件中的接地金属部 其中，所述接地金属部分连接到所述上基板上的所述第一接地线。

公开(公告)号：EP2768290A1

公开(公告)日：2014-08-20

申请号：EP13199243.0

申请日：2013-12-20

Applicant: SUMIDA flexible connections GmbH

Inventor： Röder, Jürgen

IPC: H05K1/18 ,  F21S4/00 ,  H05K3/00

CPC classification number: H05K1/189 ,  H05K3/005 ,  H05K3/202 ,  H05K2201/0919 ,  H05K2201/10106

Abstract: Die Erfindung betrifft ein elektronisches Bauteil mit einem Träger (14), einem oder mehreren elektronischen Bauelementen (8) und einem Flachleiterkabel (2), das zumindest zwei parallel zueinander verlaufende Flachleiter (3) aus einem elektrisch leitfähigen Material aufweist, die zwischen einer ersten Kunststofffolie (4) und einer zweiten Kunststofffolie (5) angeordnet sind und mittels zumindest einer Klebstoffschicht (11, 12) mit diesen verklebt sind, wobei in der ersten Kunststofffolie (4) erste Aussparungen (6) unter Ausbildung freiliegender Bereiche (7) der Flachleiter (3) ausgebildet sind, auf die die elektronischen Bauelemente (8) montiert sind. Dabei ist vorgesehen, dass das Flachleiterkabel (2) mit seiner zweiten Kunststofffolie (5) auf dem Träger (14) aufliegt, wobei in der zweiten Kunststofffolie (5) zweite Aussparungen (9) unter Ausbildung freiliegender Bereiche (13) der zumindest einen Klebstoffschicht (11, 12) ausgebildet sind, über die das Flachleiterkabel (2) mit dem Träger (14) verklebt ist.

Abstract translation: 组件即灯，具有支撑件，一组电子元件（8）和扁平导体电缆（2），其布置有两个相互平行的导电材料制成的扁平导体导体（3），塑料膜 （4）和另一塑料薄膜（5）。 前一塑料薄膜布置有一组凹槽（6）。 另一组凹槽（9）设置在后一塑料薄膜中，用于通过一组粘合剂层形成暴露区域，扁平导体电缆通过该组粘合到支架上。 对于电子部件的制造方法也包含独立权利要求。

公开(公告)号：EP2451259A4

公开(公告)日：2013-07-03

申请号：EP10820151

申请日：2010-09-30

Applicant: PANASONIC CORP

Inventor： KASHIWAGI TAKAFUMI ,  SAKAI YUKIO ,  TADA NOBUHIRO ,  HIRUMA TAKAYUKI

IPC: H05K3/46 ,  H01L23/00 ,  H01L23/28

CPC classification number: H05K3/284 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/1531 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2203/1316 ,  Y10T29/4913 ,  H01L2224/81 ,  H01L2924/00012

公开(公告)号：EP2542039A1

公开(公告)日：2013-01-02

申请号：EP12003020.0

申请日：2012-04-30

Applicant: Bauer, Jörg R.

Inventor： Bauer, Jörg R.

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/1241 ,  B29C64/112 ,  H05K2201/0919

Abstract: Verfahren zum Herstellen von elektrischen,- elektronischen Funktionen auf einem Substrat, sowie nach dem Verfahren hergestelltes Bauteil, wobei die geometrische Abmessung einer Trennschicht funktionsbezogen der geometrischen Abmessung einer Funktionsschicht zugeordnet ist, und stufenförmige angeordnete Kontaktflächen (34) der sich überlagernden Funktionsschichten so gebildet werden, indem jeweils in den der Funktionsschicht überlagernden Schichtbereichen eine Aussparung in der geometrischen Abmessung erfolgt. Digital gesteuerte, aushärtbare Flüssigkeitströpfchen (54) werden zur Bildung einer leitfähigen Funktionsschicht volumenbildend so aufgebracht, dass zumindest zwischen zwei Funktionsschichten, aus unterschiedlichen Schichtbereichen, eine leitfähige Verbindung gebildet wird.

Abstract translation: 该方法涉及布置功能层（10）和一个隔离层（22），一个在另一个之上，并以功能层的几何尺寸分配分离层的几何尺寸。 的功能层的接触表面被布置在一个步骤寻求的形式没的凹部在所述重叠功能层的区域形成。 数字控制的，可固化的液滴（54），用于形成导电功能层的体积被施加到检查并导电连接在所述功能层的不同层区域之间形成的凹部。 因此独立claimsoft被包括为一个组件。

公开(公告)号：EP1520454B1

公开(公告)日：2012-01-25

申请号：EP03762158.8

申请日：2003-06-27

Applicant: PPG Industries Ohio, Inc.

Inventor： WANG, Alan E. ,  OLSON, Kevin C. ,  DI STEFANO, Thomas H.

IPC: H05K3/44 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A circuit board layer (2) in accordance with the present invention includes a conductive sheet (4) sandwiched between an insulating top layer (10) and an insulating bottom layer (14). The top and bottom layers (10) and (14) and the conductive sheet (4) define the circuit board layer (2) having an edge that includes an edge (20) of the conductive sheet (4). An insulating edge layer (18) covers substantially all of the edge (20) of the conductive sheet (4).

公开(公告)号：EP2063694A4

公开(公告)日：2010-09-22

申请号：EP07807512

申请日：2007-09-19

Applicant: PANASONIC ELEC WORKS CO LTD

Inventor： KOBAYASHI MITSURU

IPC: H05K5/02 ,  H04B1/08 ,  H04R25/00

CPC classification number: H05K1/142 ,  H01R13/514 ,  H04B1/08 ,  H04R25/60 ,  H04R25/604 ,  H05K1/0284 ,  H05K1/0298 ,  H05K1/119 ,  H05K1/183 ,  H05K3/326 ,  H05K2201/09118 ,  H05K2201/0919 ,  H05K2201/10037 ,  H05K2201/10083 ,  H05K2201/1059 ,  H05K2201/209

公开(公告)号：EP1911334B1

公开(公告)日：2010-01-20

申请号：EP07787502.9

申请日：2007-07-13

Applicant: Evonik Degussa GmbH

Inventor： KARACS, Gabor ,  ZILLGER, Tino ,  FRANZ, Thoralt

IPC: H05K1/11

CPC classification number: H05K3/403 ,  H05K1/118 ,  H05K3/0052 ,  H05K3/281 ,  H05K2201/0919 ,  Y10T29/49208 ,  Y10T29/5313

Abstract: The invention relates to a method and to a system for electrically coupling an information carrier to a contact element, wherein the information carrier has a conductor track structure with a contact zone, which is embedded between two substrate layers, which are connected firmly to one another, and the contact element is brought into electrical contact with the contact zone. The information carrier is in this case first cut or stamped in such a way that the contact zone is exposed in an edge region and then the contact element is brought into electrical contact with the contact zone in this edge region.

公开(公告)号：EP1911334A1

公开(公告)日：2008-04-16

申请号：EP07787502.9

申请日：2007-07-13

Applicant: Printed Systems GmbH

Inventor： KARACS, Gabor ,  ZILLGER, Tino ,  FRANZ, Thoralt

IPC: H05K1/11

CPC classification number: H05K3/403 ,  H05K1/118 ,  H05K3/0052 ,  H05K3/281 ,  H05K2201/0919 ,  Y10T29/49208 ,  Y10T29/5313

Abstract: The invention relates to a method and to a system for electrically coupling an information carrier to a contact element, wherein the information carrier has a conductor track structure with a contact zone, which is embedded between two substrate layers, which are connected firmly to one another, and the contact element is brought into electrical contact with the contact zone. The information carrier is in this case first cut or stamped in such a way that the contact zone is exposed in an edge region and then the contact element is brought into electrical contact with the contact zone in this edge region.