公开(公告)号：JP2003109334A

公开(公告)日：2003-04-11

申请号：JP2002187246

申请日：2002-06-27

Applicant: ST MICROELECTRONICS INC

Inventor： HEYDARI FEREIDOON ,  OZDEMIR HAKAN ,  ARF SADIK O

IPC: G11B20/10 ,  G11B5/596 ,  G11B20/14 ,  G11B21/10

Abstract: PROBLEM TO BE SOLVED: To provide a servo circuit containing a synchronous servo channel and a method for synchronously restoring servo data from a data storage disk. SOLUTION: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase data capacity in hard disk drives (HDD), one can shorten a servo format and/or increase track density. This servo system has circuits that allow a high-performance and accurate system for positioning read-write heads. Major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts.

公开(公告)号：JP2002134678A

公开(公告)日：2002-05-10

申请号：JP2001271813

申请日：2001-09-07

Applicant: ST MICROELECTRONICS INC

Inventor： ANTHONY M CHU

IPC: H01L23/28 ,  G06K9/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50 ,  H01L23/60

Abstract: PROBLEM TO BE SOLVED: To provide electrostatic discharge protection technology improving a packaged integrated circuit. SOLUTION: In the packaged integrated circuit, electrostatic discharge protection is given by a part of a lead frame mounting a finger printing sensor integrated circuit die 104. A part of the lead frame is folded around the side part of the sealed integrated circuit 104 and on the surface on the periphery or adjacent to the sealed integrated circuit die 104 to form electrostatic discharge rings 108a, 108b, 108c. The electrostatic discharge rings 108a, 108b, 108c are connected to ground, and when a finger comes in contact with the electrostatic discharge rings 108a, 108b, 108c, electrostatic charge supplied from the finger is dissipated to the ground.

公开(公告)号：JP2002064569A

公开(公告)日：2002-02-28

申请号：JP2001185381

申请日：2001-06-19

Applicant: ST MICROELECTRONICS INC

Inventor： ZABRODA OLEKSIY

IPC: H04L25/02 ,  H02M3/335 ,  H04L27/00

Abstract: PROBLEM TO BE SOLVED: To provide a line driver that has a self-tuning type output impedance and the is provided with a hybrid applicable to a communication unit where transmission and reception are simultaneously performed through the same transmission line and that can be operated in an efficient mode. SOLUTION: Each pre-driver receives a driver input signal and outputs a buffer input signal and a DC offset compensation signal. A balanced bridge hybrid is connected between a buffer output terminal and an internal node. A regulation circuit generates a regulation signal to process a hybrid output during a training mode period and to apply the processed hybrid output to an adjustable current source in each buffer. By controlling the adjustable current source with the regulation signal, the output impedance of the buffer can be made to match the characteristic impedance of a transmission line connected to the transformer secondary coil.

公开(公告)号：JP2002025249A

公开(公告)日：2002-01-25

申请号：JP2001198058

申请日：2001-06-29

Applicant: ST MICROELECTRONICS INC

Inventor： BRADY JAMES

IPC: G11C11/22 ,  G11C11/56

Abstract: PROBLEM TO BE SOLVED: To provide technique for maintaining data stored in a ferroelectric memory device. SOLUTION: A 1st circuit for selectively and logically inverting the data in the ferroelectric memory device is provided. A 2nd circuit enables the 1st circuit in one or more prescribed hours. A 3rd circuit logically inverts data to be written and data read to/from the ferroelectric memory device after every other prescribed hour. Thus, the imprint effect can be reduced by inverting a data value stored in the ferroelectric memory device.

公开(公告)号：JP2002007116A

公开(公告)日：2002-01-11

申请号：JP2001164895

申请日：2001-05-31

Applicant: ST MICROELECTRONICS INC

Inventor： PROTIP ROY

IPC: G06F9/38

Abstract: PROBLEM TO BE SOLVED: To increase an instruction dispatch speed in a super-scalar microprocessor-equipped with an out-of-order instruction rack. SOLUTION: This microprocessor is provided with plural resources for executing an instruction and an out-of-order instruction rack for tracking the priority/ age of the instruction. The instruction rack is provided with an instruction pool equipped with plural slots for storing the respective instructions and an instruction age tracker for storing a matrix constituted of lines and columns in logical states related with the relative ages of the instructions. The applied intra-column and intra-line logical states of the matrix are related with the respective slots of the instruction pool.

公开(公告)号：JP2001349911A

公开(公告)日：2001-12-21

申请号：JP2001085086

申请日：2001-03-23

Applicant: ST MICROELECTRONICS INC

Inventor： ELLIOT WILLIAM D

IPC: G01R25/00 ,  G02F1/133 ,  G06F1/04 ,  G09G3/20 ,  G09G5/00 ,  H03K5/26 ,  H03L7/06 ,  H03L7/081 ,  H03L7/085 ,  H04N5/12 ,  H04N5/66

Abstract: PROBLEM TO BE SOLVED: To provide a technology of measuring the phase difference between synchronous signals with high accuracy. SOLUTION: This system has an integrated circuit device for comparing the relative phases of first and second signals with each other with very high accuracy. This system has a first input for receiving the first signal provided with a first edge and a second input for receiving the second signal provided with a second edge. A first delay chain has at least one first delay element, and a second delay chain has at least one second delay element. At least one symmetric flip flop has the first and second inputs connected to each output tap of the first and second delay elements, and the output of the flip flop indicates which of the first and second edges reaches the first and second inputs first.

公开(公告)号：JP2001273720A

公开(公告)日：2001-10-05

申请号：JP2001037421

申请日：2001-02-14

Applicant: ST MICROELECTRONICS INC

Inventor： OZDEMIR HAKAN ,  BYRNE JASON D

IPC: G11B20/10 ,  G11B20/14 ,  H03L7/091

Abstract: PROBLEM TO BE SOLVED: To provide improved technology to determine the phase difference between a sample clock and sampled signals. SOLUTION: The circuit is provided with a buffer which receives two sampled signals and stores the signals and a phase computing circuit which computes the phase difference between one of the sampled signals and a prescribed point of the signals. The circuit is used to reduce matching obtaining time of a digital timing recovery loop. Thus, the use of the circuit makes it possible to reduce sector preamble and also to increase the data storage density of a disk. In one embodiment, the circuit is used to determine an initial phase difference between disk drive reading signals and a reading sample clock. The digital timing recovery loop provides an initial coarse matching between read signals and a sample clock by using the phase difference. By giving the initial coarse matching, the recovery loop reduces overall matching obtaining time.

公开(公告)号：JP2001216195A

公开(公告)日：2001-08-10

申请号：JP2000397620

申请日：2000-12-27

Applicant: ST MICROELECTRONICS INC

Inventor： FLAKE LANCE LESLIE ,  TIMOTHY RICHARD FELDMANN

IPC: G06F12/08

Abstract: PROBLEM TO BE SOLVED: To provide a technology to specify a form of a cache to permit efficient common use of a binary dimension memory space between use of cache and use of non-cache and to access the cache. SOLUTION: A storage device with plural blocks is provided and each block is identified by a block address. A target block address is identified by an access request. The target block address consists of an upper part and a lower part. Non-binary operation is executed for the upper part and a quotient and odds are generated. Its odd part is coupled with the lower part and an index is created. The index is applied to tag memory structure and one or one set of entries in the tag memory structure are selected. The contents of the selected entries are compared with a quotient part and whether or not its target block is expressed in the cache is decided.

公开(公告)号：JP2001196942A

公开(公告)日：2001-07-19

申请号：JP2000329757

申请日：2000-10-30

Applicant: ST MICROELECTRONICS INC

Inventor： YANG HONDA

IPC: G06F11/10 ,  H03M13/09 ,  H03M13/15 ,  H03M13/27

Abstract: PROBLEM TO BE SOLVED: To provide an enhanced system and method by which additional error retrieval capability can be provided almost without an overhead. SOLUTION: A column parity check symbol in generated by using a symbol from a selected column in an interleave type code word. The width of each column parity check symbol in decreased and the decreased column parity check symbols are unified to generate a unified column parity check symbol. The Reed Solomon encoding algorithm in applied to the unified column parity check symbol to generate an error location retrieval check symbol, which is combined with the decreased column parity check symbol to generate an error location retrieval code word. The error location retrieval check symbol is stored in a memory with the interleave type code word.

公开(公告)号：JP2001178015A

公开(公告)日：2001-06-29

申请号：JP2000337402

申请日：2000-11-06

Applicant: ST MICROELECTRONICS INC

Inventor： SWANSON DAVID F ,  MERLO MAURO

IPC: H02J7/16 ,  H02J7/14 ,  H02P9/14 ,  H02P9/30

Abstract: PROBLEM TO BE SOLVED: To provide a programmable system and method for regulating an alternator charging system. SOLUTION: This system includes a memory storing regulation voltage, used at a particular temperature for a particular alternator charging system condition of an alternator, and a circuit which generates a digital signal indicating both of battery temperature and charging system voltage supplied by the alternator charging system. A digital comparator receives the digital signal, compares it with the regulation voltage supplied to the inside of the memory relative to a particular temperature indicating the battery temperature supplied by the alternator charging system, and transmits a regulator control signal.