Abstract:
Disclosed are a graphene memory using a graphene layer as a charge-trap layer and a method of operating the same. The graphene memory includes a source and a drain spaced apart from each other on a conductive semiconductor substrate; a graphene layer which comes into contact with the conductive semiconductor substrate and is spaced apart from the source and the drain on the substrate between the source and the drain; and a gate electrode formed on the graphene layer. A Schottky barrier is formed between the conductive semiconductor substrate and the graphene layer such that the graphene layer stores charges.
Abstract:
An electronic device is disclosed. The disclosed electronic device includes a semiconductor layer, graphene which is directly in contact with the preset region of the semiconductor layer, and a metal layer which is formed on the graphene. The semiconductor layer has a totally uniform doping concentration or has a preset region of a doping concentration of 10^19 cm^-3 or less.
Abstract:
Disclosed is a tunneling field effect transistor including a graphene channel. The disclosed tunneling field effect transistor comprises a first electrode on a substrate, a semiconductor layer on the first electrode, a graphene channel which is extended in a first region which is separated from the first electrode on the semiconductor layer, a second electrode on the graphene channel disposed on the first region, a gate insulating layer which covers the graphene channel, and a gate electrode on the gate insulating layer. The first electrode and the graphene channel face the semiconductor layer in the second region.
Abstract:
PURPOSE: A graphene transferring member, a graphene transferring method, and a method for manufacturing a graphene device are provided to protect graphene by forming a metal thin film layer on the graphene. CONSTITUTION: A graphene transferring member includes a metal thin film layer(220) and a graphene layer(230) which are successively laminated on an adhesive member(210). The metal thin film layer and the graphene layer are patterned with the same shape. The metal thin film layer includes electrode forming units which are separated, and a metal part between the electrode forming units. The electrode forming unit becomes an electrode on the graphene layer by removing the metal part.
Abstract:
그래핀성장분석법에관해개시되어있다. 개시된방법은기판상에 2D 물질을형성한다음, 결함을탐지하기위한물질(결함을표시하기위한물질)을 2D 물질의결함상에증착시키고, 상기탐지물질이증착된 2D 물질의이미지를획득하거나상기탐지물질의맵 좌표를획득하고, 획득한이미지나맵 좌표를처리한다. 이러한방법에서상기탐지물질은원자층증착이나화학기상증착을이용하여상기 2D 물질결함상에증착시킬수 있다. 상기탐지물질은유기물질또는무기물질일수 있다. 상기유기물질과상기무기물질은금속, 반도체또는유전체일수 있다. 상기유전체는산화물일수 있다. 상기탐지물질이증착된 2D 물질의이미지는 TEM, SEM, CD-SEM 또는 OM으로촬영하여획득할수 있다.
Abstract:
그래핀 소자 및 이의 제조 방법이 개시된다. 개시된 그래핀 소자는 반도체 기판와, 반도체 기판 상의 일 영역에 배치된 그래핀층와, 그래핀층 상의 제1 영역에 형성된 제1 전극과, 그래핀층 상의 제2 영역에 형성된 제2 전극과, 그래핀층과 상기 제2 전극의 사이에 개재되는 절연층과, 반도체 기판 상의 그래핀층이 형성되지 않은 제3 영역에 형성된 제3 전극을 포함하며, 반도체 기판은 제1 전극, 그래핀층, 및 반도체 기판의 접합에 의해 제2 전극에 전압이 인가될 때보다 인가되지 않을 때 더 큰 쇼트키 배리어를 갖는다.