公开(公告)号：KR1020090037101A

公开(公告)日：2009-04-15

申请号：KR1020070102536

申请日：2007-10-11

Applicant: 성균관대학교산학협력단

Inventor： 서수정 ,  정근희 ,  이용호 ,  장주희 ,  김장현

IPC: H01L21/027 ,  H01L21/288

CPC classification number: H01L21/76874 ,  G03F7/42 ,  H01L21/0274 ,  H05K3/422

Abstract: A method for forming a metal pattern of a substrate is provided to directly form a pattern on a surface of a substrate without a coating process of a metal film by increasing roughness of the surface of the substrate. A predetermined pattern is formed by performing a photolithography process on a surface of a substrate(S1). The pattern is formed by a photoresist in a pattern forming step. The photoresist is made of negative AZ5214 material. The photolithography process is performed by irradiating an ultraviolet ray. A roughness of a surface of a part etched on the substrate is improved(S2). A roughness improving process is performed by a sanding process. The photoresist on the surface of the substrate is removed by performing a strip process. A selective metal pattern is formed by performing an electroless plating process(S3).

Abstract translation: 提供了形成基板的金属图案的方法，以通过增加基板的表面的粗糙度，直接在基板的表面上形成图案，而不用金属膜的涂覆处理。 通过在基板的表面上进行光刻工序来形成规定的图案（S1）。 图案由图案形成步骤中的光致抗蚀剂形成。 光致抗蚀剂由负AZ5214材料制成。 通过照射紫外线进行光刻处理。 蚀刻在基板上的部分的表面的粗糙度得到改善（S2）。 通过砂光处理进行粗糙度改善处理。 通过进行剥离处理，去除衬底表面上的光致抗蚀剂。 通过进行化学镀处理来形成选择性金属图案（S3）。

公开(公告)号：KR1020090035963A

公开(公告)日：2009-04-13

申请号：KR1020070101019

申请日：2007-10-08

Applicant: 성균관대학교산학협력단

Inventor： 서수정 ,  김장현 ,  정근희 ,  장주희 ,  이용호 ,  김태성 ,  강치구

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01L21/76897 ,  H01L21/3213 ,  H01L21/76838

Abstract: A formation method of the through hole electrode is provided to reduce the process time by growing the conductor material based on the side wall seed layer of the through hole. The through hole formation step is the step that forms one or more through holes on the substrate by using the RIE(Reactive Ion Etch) etcher etc(S1). The through hole is formed by the dry etching process. A step for forming the side wall seed layer is to form the side wall seed layer in the inner wall surface of the through hole of substrate(S2). The side wall seed layer is formed by the electroless plating process. A step for forming the coated layer is to form the coated layer including the dry film formed in the one side of substrate(S3). The coated layer is formed by the general coating progress. The though electrode is formed by filling up the conductor material including Cu etc from the side wall seed layer of the through hole to the center(S4).

Abstract translation: 提供通孔电极的形成方法，以通过基于通孔的侧壁种子层生长导体材料来缩短处理时间。 通孔形成步骤是通过使用RIE（反应离子蚀刻）蚀刻器等在基板上形成一个或多个通孔的步骤（S1）。 通孔是通过干式蚀刻工艺形成的。 用于形成侧壁种子层的步骤是在基板的通孔的内壁表面中形成侧壁种子层（S2）。 侧壁种子层通过无电镀方法形成。 形成涂层的步骤是形成包含在基材一侧形成的干膜的涂层（S3）。 涂层通过一般的涂层进行形成。 贯通电极通过从贯通孔的侧壁种子层向中央填充包括Cu等的导体材料而形成（S4）。