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    SPACER LOCATOR DESIGN FOR THREE-DIMENSIONAL FOCUSING STRUCTURES IN A FLAT PANEL DISPLAY
    11.
    发明公开
    SPACER LOCATOR DESIGN FOR THREE-DIMENSIONAL FOCUSING STRUCTURES IN A FLAT PANEL DISPLAY 失效
    ENTWURF EINEM ABSTARDSHALTER-POSITIONSBESTIMMERFÜREINE DREI-DIMENSIONALE FOKUSIERUNGSTRUKTUR IN EINERFLACHANZEIGEGERÄT

    公开(公告)号：EP1019939A4

    公开(公告)日：2000-08-02

    申请号：EP97932501

    申请日：1997-07-16

    Applicant: CANDESCENT TECH CORP

    Inventor： SPINDT CHRISTOPHER J ,  FIELD JOHN E

    IPC: H01J9/24 ,  H01J9/18 ,  H01J29/02 ,  H01J29/87 ,  H01J31/12 ,  H01J19/42

    CPC classification number: H01J29/028 ,  H01J9/185 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655

    Abstract: A flat panel display (300) having a faceplate structure (320), a backplate structure (330), a focusing structure (333a), and a plurality of spacers (340). The backplate structure includes an electron emitting structure (332) which faces the faceplate structure. The focusing structure has a first surface which is located on the electron emitting structure, and a second surface which extends away from the electron emitting structure. The electrical end of the combination of the focusing structure and the electron emitting structure is located at an imaginary plane located intermediate the first and second surfaces of the focusing structure. The spacers are located between the focusing structure and the light emitting structure. Each spacer is located within a corresponding groove in the focusing structure such that the electrical end of each spacer is located coincident with the electrical end of the combination of the focusing structure and the electron emitting structure.

    Abstract translation: 一种平板显示器，包括：面板结构; 具有电子发射结构的背板结构; 聚焦结构具有耦合到电子发射结构的第一表面和远离电子发射结构延伸的第二表面，聚焦结构和电子发射结构在聚焦结构的第一和第二表面之间具有电端; 位于聚焦结构和面板结构之间的间隔物，间隔物具有位于聚焦结构的电端上方的电端和电子发射结构; 位于所述间隔件的表面的面电极; 以及用于控制面电极的电压以产生邻近面电极的电压分布，该电压分布补偿由位于聚焦结构的电端上方的间隔物的电端引起的电压分布，以及电子发射 结构，所述控制装置包括（a）位于所述间隔件的第一边缘表面处的第一边缘电极，仅沿着所述第一边缘表面的一部分延伸，并且接触所述背板结构和（b）位于第二边缘电极处的​​第二边缘电极 间隔物的边缘表面并接触面板结构。

    13.
    发明专利
    未知

    公开(公告)号：DE69935343D1

    公开(公告)日：2007-04-12

    申请号：DE69935343

    申请日：1999-07-08

    Applicant: CANDESCENT TECH CORP

    Inventor： ELLOWAY DONALD J ,  MORRIS DAVID L ,  SCANNELL WILLIAM J ,  SPINDT CHRISTOPHER J

    IPC: G09G3/10 ,  G09G3/22 ,  H01J9/44 ,  H01J29/04 ,  H01J31/12

    Abstract: A method of removing contaminant particles in newly fabricated filed emission displays. Contaminant particles are removed by a conditioning process which includes the steps of: a)driving an anode (20) of a field emission display (FED) to a predetermined voltage; b) slowly increasing an emission current of the FED after the anode has reached the predetermined voltage; and c) providing an ion-trapping device for catching the ions and particles knocked off, or otherwise released, by emitted electrons (40). By driving the anode to the predetermined voltage and by slowly increasing the emission current of the FED, contaminant particles are effectively removed without damaging the FED. A method of operating FEDs is also provided to prevent gate-to-emitter current during turn-on and turn-off, which comprises the steps of: a) enabling the anode display screen (20); and b) enabling the electron-emitters (40) after the anode display screen is enabled. By allowing sufficient time for the anode display screen to reach a predetermined voltage before the emitter is enabled, the emitted electrons (40) will be attracted to the anode (20).

    DEVICE FOR CONDITIONING CONTROL SIGNAL TO ELECTRON EMITTER, PREFERABLY SO THAT COLLECTED ELECTRON CURRENT VARIES LINEARLY WITH INPUT CONTROL VOLTAGE
    15.
    发明专利
    DEVICE FOR CONDITIONING CONTROL SIGNAL TO ELECTRON EMITTER, PREFERABLY SO THAT COLLECTED ELECTRON CURRENT VARIES LINEARLY WITH INPUT CONTROL VOLTAGE 未知

    公开(公告)号：HK1025871A1

    公开(公告)日：2000-11-24

    申请号：HK00103525

    申请日：2000-06-12

    Applicant: CANDESCENT TECH CORP

    Inventor： HANSEN RONALD L ,  SPINDT CHRISTOPHER J ,  FIELD JOHN E

    IPC: G09G3/20 ,  G09G3/22 ,  H01J1/304 ,  H05B37/00 ,  H05B ,  G09G

    Abstract: A voltage-adjustment section (20) of an electronic device converts an input control voltage (V1) into an output control voltage (V0) in such a way that a collector current (ICP) form with electrons emitted from an emitter (EP) of an emission/collection cell (26), or triode, varies in a desired, typically linear, manner with the input control voltage. The triode further includes a collector (CP) that carries the collector current and a gate electrode (GP) that regulates the collector current as a function of the output control voltage. Control of the collector current so as to achieve the desired current/voltage relationship is achieved with an analog control loop containing the triode and an amplifier (28) coupled between the triode's collector and gate electrode. The triode thus typically has a linear gamma characteristic relative to the input control voltage. The voltage-adjustment section is suitable for use in a display device such as a flat-panel display.

    MULTILAYER ELECTRODE STRUCTURE AND METHOD FOR FORMING
    16.
    发明公开
    MULTILAYER ELECTRODE STRUCTURE AND METHOD FOR FORMING 审中-公开
    MEHRSCHICHTIGE ELEKTRODENSTRUKTUR UND HERSTELLUNGSVERFAHREN

    公开(公告)号：EP1297548A4

    公开(公告)日：2005-11-23

    申请号：EP01944257

    申请日：2001-05-31

    Applicant: CANDESCENT TECH CORP

    Inventor： LEE JUENG GIL ,  SPINDT CHRISTOPHER J ,  CHAKRAVORTY KISHORE K ,  KNALL JOHAN ,  BONN MATTHEW A

    IPC: G09F9/30 ,  H01J9/02 ,  H01J9/14 ,  H01J29/02 ,  H01J29/04 ,  H01J31/12 ,  H05K3/06

    CPC classification number: H01J9/025 ,  H01J9/148 ,  H01J29/02

    Abstract: A first embodiment (Figs. 29A-29H) comprises a multilayer electrode (2906) for a panel display device and a method for forming a nultilayer electrode (2906) for a flat panel display device. The multilayer electrode (2096) is formed by depositing a metal alloy layer (2902). After the deposition of the metal alloy layer (2902), a protective layer (2904) is deposited above the metal alloy layer (2902) to form a multilayer stack (2906). The multilayer stack (2906) is subjected to a cleansing process to remove contaminants. Subsequently, the multilayer stack (2906) is etched to form the multilayer electrode (2906) for the flat panel display device. Another embodiment (Figs. 30-311) comprises a method of forming a multilayer stack (3106) is formed by depositing a first metal alloy layer (3102) above the substrate (3100). After the deposition of te metal alloy layer (3102), a barrier layer (3103) is formed above the first metal alloy layer (3102). The barrier layer (3103) is adapted to prevent the formation of an intermetallic compound within the first metal alloy layer (3102). Subsequently, a second metal alloy layer (3104) is deposited above the barrier layer (3103). The barrier layer (3103) prevents the formation of the intermetallic compound within the second metal alloy layer (3104).

    Abstract translation: 第一实施例（图29A-29H）包括用于面板显示装置的多层电极（2906）和用于形成平板显示装置的多层电极（2906）的方法。 通过沉积金属合金层（2902）形成多层电极（2096）。 在沉积金属合金层（2902）之后，在金属合金层（2902）的上方沉积保护层（2904）以形成多层叠层（2906）。 对多层堆叠（2906）进行清洁处理以除去污染物。 随后，蚀刻多层堆叠（2906），以形成用于平板显示装置的多层电极（2906）。 另一实施例（图30-311）包括通过在衬底（3100）上沉积第一金属合金层（3102）而形成多层堆叠（3106）的方法。 在金属合金层（3102）的沉积之后，在第一金属合金层（3102）的上方形成阻挡层（3103）。 阻挡层（3103）适于防止在第一金属合金层（3102）内形成金属间化合物。 随后，在阻挡层（3103）的上方沉积第二金属合金层（3104）。 阻挡层（3103）防止在第二金属合金层（3104）内形成金属间化合物。

    METHOD AND APPARATUS FOR BRIGHTNESS CONTROL IN A FIELD EMISSION DISPLAY
    18.
    发明公开
    METHOD AND APPARATUS FOR BRIGHTNESS CONTROL IN A FIELD EMISSION DISPLAY 失效
    DEVICE AND METHOD FOR控制亮度场致发射显示器

    公开(公告)号：EP1031129A4

    公开(公告)日：2001-01-10

    申请号：EP98937003

    申请日：1998-07-23

    Applicant: CANDESCENT TECH CORP

    Inventor： HANSEN RONALD L ,  SPINDT CHRISTOPHER J

    IPC: G09G3/20 ,  G09G3/22 ,  G09G3/00 ,  G09G3/10

    CPC classification number: G09G3/22 ,  G09G2320/029 ,  G09G2320/041 ,  G09G2320/043 ,  G09G2320/0606 ,  G09G2320/0626

    Abstract: A method and apparatus to provide performance adjustments for FEDs during operation are provided. More specifically, the present invention provides two circuit embodiments for compensating for temperature induced brightness variations of the panel display. In a closed loop embodiment, a sample display circuit (501) that is substantially similar to a FED (300) being adjusted is used to generate a performance indicator signal which is compared against a reference signal to determine a difference signal. The difference signal is then used to adjust the operation performance of the FED as well as the sample display circuit. In an opened loop embodiment, a current source (609) generates a reference current across a sample resistor (603) which is made from the same material as the resistor layer (111) inside the FED's cathode (107). The voltage across the sample resistor is compared against a reference signal to determine a difference signal. The difference signal is then used to increase or decrease the brightness of the panel display, as needed, to compensate for temperature induced variations or other types of environment induced variations (e.g., humidity, aging, mild voltage drift that creates undesirable current drift, etc.) thereof.

    Methods and systems for measuring display attributes of a fed
    20.
    发明专利
    Methods and systems for measuring display attributes of a fed 未知

    公开(公告)号：AU2002320162A1

    公开(公告)日：2003-03-03

    申请号：AU2002320162

    申请日：2002-06-24

    Applicant: CANDESCENT TECH CORP

    Inventor： HANSEN RONALD L ,  CRESSI LEE ,  SPINDT CHRISTOPHER J ,  DUNPHY JAMES C ,  LIU JUN ,  CUMMINGS WILLIAM ,  STANNERS COLIN

    IPC: G01R31/24 ,  G09G3/20 ,  G09G3/22 ,  G09G3/10

    Abstract: In a field emission display (FED) device comprising: rows and columns of emitters; and an anode electrode, a method of measuring display attributes of said FED device comprising the steps of: a) in a scan fashion, individually driving each row and measuring the current drawn by each row, wherein a settling time is allowed after each row is driven; b) measuring a background current level during a vertical blanking interval; c) correcting current measurements taken during said step a) by said background current level to yield corrected current measurements; d) averaging multiple corrected current measurements taken over multiple display frames to produce averaged corrected current values for all rows of said FED device; and e) generating a memory resident correction table based on said averaged corrected current values.

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