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    FLAT PANEL DISPLAY AND METHOD INVOLVING COLUMN ELECTRODE
    1.
    发明申请
    FLAT PANEL DISPLAY AND METHOD INVOLVING COLUMN ELECTRODE 审中-公开
    平板显示器和涉及柱电极的方法

    公开(公告)号：WO0051154A8

    公开(公告)日：2000-11-23

    申请号：PCT/US0001940

    申请日：2000-01-26

    Applicant: CANDESCENT TECH CORP

    Inventor： CHAKRAVORTY KISHORE K ,  NADI FARIBORZ ,  SPINDT CHRISTOPHER J ,  HANSEN RONALD L ,  STANNERS COLIN D

    IPC: H01J3/02 ,  H01J9/02 ,  H01J29/02 ,  H01J1/02

    CPC classification number: H01J9/148 ,  H01J3/022 ,  H01J29/02

    Abstract: A structure and method for forming a column electrode for a field emission display device wherein the column electrode (702) is disposed beneath the field emitters and the row electrode. In one embodiment, the present invention comprises depositing a resistor layer (706) over portions of a column electrode (702). Next, an inter-metal dielectric layer (708) is deposited over the column electrode. In the present embodiment, the inter-metal dielectric layer (708) is deposited over portions of the resistor layer (706) and over pad areas (704a, 704b) of the column electrode (702). After the deposition of the inter-metal dielectric layer (708), the column electrode (702) is subjected to an anodization process such that the exposed regions of the column electrode (702) are anodized. In so doing, the present invention provides a column electrode structure (702) which is resistant to column to row electrode shorts and which is protected from subsequent processing steps.

    Abstract translation: 一种用于形成用于场致发射显示装置的列电极的结构和方法，其中列电极（702）设置在场发射极和行电极之下。 在一个实施例中，本发明包括在列电极（702）的部分上沉积电阻层（706）。 接下来，在列电极上沉积金属间介电层（708）。 在本实施例中，金属间介电层（708）沉积在列电极（702）的电阻层（706）和焊盘区域（704a，704b）的部分上。 在沉积金属间介电层（708）之后，对列电极（702）进行阳极氧化处理，使得列电极（702）的暴露区域被阳极氧化。 在这样做时，本发明提供了一种对柱对电极短路有抵抗能力的列电极结构（702），其不受后续处理步骤的保护。

    MULTILAYER ELECTRODE STRUCTURE AND METHOD FOR FORMING
    5.
    发明公开
    MULTILAYER ELECTRODE STRUCTURE AND METHOD FOR FORMING 审中-公开
    MEHRSCHICHTIGE ELEKTRODENSTRUKTUR UND HERSTELLUNGSVERFAHREN

    公开(公告)号：EP1297548A4

    公开(公告)日：2005-11-23

    申请号：EP01944257

    申请日：2001-05-31

    Applicant: CANDESCENT TECH CORP

    Inventor： LEE JUENG GIL ,  SPINDT CHRISTOPHER J ,  CHAKRAVORTY KISHORE K ,  KNALL JOHAN ,  BONN MATTHEW A

    IPC: G09F9/30 ,  H01J9/02 ,  H01J9/14 ,  H01J29/02 ,  H01J29/04 ,  H01J31/12 ,  H05K3/06

    CPC classification number: H01J9/025 ,  H01J9/148 ,  H01J29/02

    Abstract: A first embodiment (Figs. 29A-29H) comprises a multilayer electrode (2906) for a panel display device and a method for forming a nultilayer electrode (2906) for a flat panel display device. The multilayer electrode (2096) is formed by depositing a metal alloy layer (2902). After the deposition of the metal alloy layer (2902), a protective layer (2904) is deposited above the metal alloy layer (2902) to form a multilayer stack (2906). The multilayer stack (2906) is subjected to a cleansing process to remove contaminants. Subsequently, the multilayer stack (2906) is etched to form the multilayer electrode (2906) for the flat panel display device. Another embodiment (Figs. 30-311) comprises a method of forming a multilayer stack (3106) is formed by depositing a first metal alloy layer (3102) above the substrate (3100). After the deposition of te metal alloy layer (3102), a barrier layer (3103) is formed above the first metal alloy layer (3102). The barrier layer (3103) is adapted to prevent the formation of an intermetallic compound within the first metal alloy layer (3102). Subsequently, a second metal alloy layer (3104) is deposited above the barrier layer (3103). The barrier layer (3103) prevents the formation of the intermetallic compound within the second metal alloy layer (3104).

    Abstract translation: 第一实施例（图29A-29H）包括用于面板显示装置的多层电极（2906）和用于形成平板显示装置的多层电极（2906）的方法。 通过沉积金属合金层（2902）形成多层电极（2096）。 在沉积金属合金层（2902）之后，在金属合金层（2902）的上方沉积保护层（2904）以形成多层叠层（2906）。 对多层堆叠（2906）进行清洁处理以除去污染物。 随后，蚀刻多层堆叠（2906），以形成用于平板显示装置的多层电极（2906）。 另一实施例（图30-311）包括通过在衬底（3100）上沉积第一金属合金层（3102）而形成多层堆叠（3106）的方法。 在金属合金层（3102）的沉积之后，在第一金属合金层（3102）的上方形成阻挡层（3103）。 阻挡层（3103）适于防止在第一金属合金层（3102）内形成金属间化合物。 随后，在阻挡层（3103）的上方沉积第二金属合金层（3104）。 阻挡层（3103）防止在第二金属合金层（3104）内形成金属间化合物。

    SPATIALLY UNIFORM DEPOSITION OF POLYMER PARTICLES DURING GATE ELECTRODE FORMATION
    6.
    发明公开
    SPATIALLY UNIFORM DEPOSITION OF POLYMER PARTICLES DURING GATE ELECTRODE FORMATION 失效
    房内有规律地分布的聚合物颗粒的降水而栅电极的制造

    公开(公告)号：EP1029337A4

    公开(公告)日：2005-04-06

    申请号：EP98936954

    申请日：1998-07-21

    Applicant: CANDESCENT TECH CORP

    Inventor： ELIZONDO PHILIP J ,  CHAKRAVORTY KISHORE K ,  CAUDILLO DAVID

    IPC: H01J9/02

    CPC classification number: H01J9/025 ,  H01J2329/00

    Abstract: A method for uniformly depositing polymer particles (800) onto the surface of a gate metal layer during the formation of a gate electrode. In one embodiment, the present invention comprises immersing a substrate (906) having a layer of a gate metal disposed over the surface thereof in a fluid bath (902) containing polymer particles. Additionally, in the present embodiment, the layer of gate metal disposed over the substrate has approximately the same thickness as a desired thickness of the gate electrode to be formed. Next, the present embodiment applies a uniform potential across the surface of the layer of gate metal such that the polymer particles (800) are uniformly deposited onto the layer of gate metal with a spatial density of approximately 100,000,000 to 1,000,000,000,000 particles per square centimeter. In the present embodiment the polymer particles adhere to the surface of the layer of gate metal via Van der Waal's forces and/or via a charge difference between each particle and the layer of gate metal. The present embodiment then removes the substrate having the layer of the gate metal and the particles deposited thereon from the fluid bath.

    Abstract translation: 用于聚合物颗粒的均匀沉积到金属栅极的表面上的栅电极的形成过程中的方法。 在一个，在本实施方式本发明包括总是唱具有在流体中的浴，其含有的聚合物颗粒其设置在所述表面上的金属栅极的层的基材。 在此，实施方式中，流体浴被包含在流体浴箱中。 另外，在本实施方式中，设置在基板上的栅极金属的层的厚度大约为所述栅电极的所希望的厚度所形成的相同。 接着，对本实施例应用跨越栅极金属的检查的层的表面均匀的电位做的聚合物粒子均匀地沉积到栅极金属的层。 在这样做时，本实施例的一致沉积在聚合物颗粒到栅金属的层。 另外，在本实施方式中，所述聚合物颗粒附着于通过范德华力和/或经由栅极金属层与各聚合物粒子之间的电荷差的栅极金属层的表面上。 在本实施方式中，所述聚合物颗粒沉积在栅极金属层的表面上每平方厘米1×10 8，大约1×10 -12至粒子的空间密度。 在本实施方式然后移除具有栅极金属的层中的底物和从流体浴沉积在其上的颗粒。

    GATE ELECTRODE FORMATION METHOD
    8.
    发明公开
    GATE ELECTRODE FORMATION METHOD 失效
    VERFAHREN ZUR HERSTELLUNG EINER GATE-ELEKTRODE

    公开(公告)号：EP0995213A4

    公开(公告)日：2001-04-04

    申请号：EP98922233

    申请日：1998-05-12

    Applicant: CANDESCENT TECH CORP

    Inventor： CHAKRAVORTY KISHORE K ,  ELIZONDO PHILIP J

    IPC: H01J9/02

    CPC classification number: H01J9/025 ,  H01J2329/00

    Abstract: A method for forming a gate electrode comprises depositing a gate metal (604) over an insulating substrate (602) and etching openings in areas of the gate layer which are exposed through a hard mask. The layer of the gate metal (604) is deposited to a thickness approximately the same as the thickness desired for the gate electrode. Next, polymer particles (700) are deposited over the layer of gate metal. A hard mask layer (800) is then deposited over the polymer particles and the layer of gate metal. Then the polymer particles (700) and portions of the hard mask (800) which overlie the polymer particles are removed such that first regions of the gate metal (604) are exposed while second regions remain covered by the hard mask. After openings have been formed completely through the gate metal in the first regions, the remaining portions of the hard mask are removed.

    Abstract translation: 一种形成栅电极的方法。 在一个实施例中，本发明包括在下面的衬底上沉积栅极金属，使得栅极金属层形成在下面的衬底之上。 在本发明中，栅极金属层被沉积​​成与栅电极所需厚度大致相同的厚度。 接下来，本发明将聚合物颗粒沉积在栅极金属层上。 然后将硬掩模层沉积在聚合物颗粒和栅极金属层上。 本发明除去聚合物颗粒和覆盖聚合物颗粒的硬掩模层的部分，使得栅极金属层的第一区域暴露，并且使得栅极金属层的第二区域保持被硬的覆盖 掩模层。 在去除步骤之后，本发明通过栅极金属层的第一区域蚀刻，使得开口完全穿过第一区域的栅极金属层形成。 在已经形成开口之后，去除覆盖在栅极金属层的第二区域上的硬掩模层的剩余部分。

    Multilayer electrode structure and method for forming
    10.
    发明专利
    Multilayer electrode structure and method for forming 未知

    公开(公告)号：AU6668401A

    公开(公告)日：2001-12-11

    申请号：AU6668401

    申请日：2001-05-31

    Applicant: CANDESCENT TECH CORP

    Inventor： LEE JUENG GIL ,  SPINDT CHRISTOPHER J ,  CHAKRAVORTY KISHORE K ,  KNALL JOHAN ,  BONN MATTHEW A

    IPC: G09F9/30 ,  H01J9/02 ,  H01J9/14 ,  H01J29/02 ,  H01J29/04 ,  H01J31/12 ,  H05K3/06

    Abstract: A first embodiment (Figs. 29A-29H) comprises a multilayer electrode (2906) for a panel display device and a method for forming a nultilayer electrode (2906) for a flat panel display device. The multilayer electrode (2096) is formed by depositing a metal alloy layer (2902). After the deposition of the metal alloy layer (2902), a protective layer (2904) is deposited above the metal alloy layer (2902) to form a multilayer stack (2906). The multilayer stack (2906) is subjected to a cleansing process to remove contaminants. Subsequently, the multilayer stack (2906) is etched to form the multilayer electrode (2906) for the flat panel display device. Another embodiment (Figs. 30-311) comprises a method of forming a multilayer stack (3106) is formed by depositing a first metal alloy layer (3102) above the substrate (3100). After the deposition of te metal alloy layer (3102), a barrier layer (3103) is formed above the first metal alloy layer (3102). The barrier layer (3103) is adapted to prevent the formation of an intermetallic compound within the first metal alloy layer (3102). Subsequently, a second metal alloy layer (3104) is deposited above the barrier layer (3103). The barrier layer (3103) prevents the formation of the intermetallic compound within the second metal alloy layer (3104).

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