公开(公告)号：DE3068118D1

公开(公告)日：1984-07-12

申请号：DE3068118

申请日：1980-09-15

Applicant: IBM

Inventor： HEUBER KLAUS ,  KLINK ERICH ,  RUDOLPH VOLKER DR ,  WIEDMANN SIEGFRIED DR

IPC: G11C11/414 ,  G11C11/40 ,  G11C11/4063 ,  G11C11/413 ,  H01L21/822 ,  H01L21/8229 ,  H01L27/02 ,  H01L27/04 ,  H01L27/102

Abstract: Disclosed is a simulated storage cell structure for use as a reference voltage generator in a semiconductor store fabricated in Merged Transistor Logic (MTL) technology. The simulated storage cell structure includes n elongated regions of P-type diffusion arranged in parallel to each other in an N-type trough of semiconductor material. The elongated P-type regions are alternately designed as collector and Injector strips.

公开(公告)号：FR2335909A1

公开(公告)日：1977-07-15

申请号：FR7634520

申请日：1976-11-08

Applicant: IBM

Inventor： HEUBER KLAUS ,  KLEIN WILFRIED ,  NAJMANN KNUT ,  WIEDMANN SIEGFRIED

IPC: G11C11/41 ,  G11C11/411 ,  G11C11/414 ,  G11C11/415 ,  G11C7/00 ,  G11C11/40

Abstract: An improved method of operating a monolithic memory together with novel and efficient circuitry for practicing said improved method is disclosed. In a bipolar transistor store, or monolithic memory, in accordance with the invention, a very low current (first level) flows from the load elements to the internal cell nodes in the stand-by mode. During the initial portion of a read cycle, current flows from the bit lines to the cell nodes, in addition to the stand-by current (second level). In the recovery period of the read cycle or write cycle a short pulse is added to the stand-by current (third level), thereby reducing the recovery time. The practice of the invention provides a monolithic memory having minimal power requirements and a substantially reduced cycle time.

公开(公告)号：FR2313777A1

公开(公告)日：1976-12-31

申请号：FR7605141

申请日：1976-02-17

Applicant: IBM

Inventor： HEUBER KLAUS ,  NAJMAN KNUT ,  REMSHARDT ROLF DR ,  TERTEL KLAUS

IPC: H01L21/822 ,  H01L21/761 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06

公开(公告)号：FR2312836A1

公开(公告)日：1976-12-24

申请号：FR7610165

申请日：1976-04-01

Applicant: IBM

Inventor： HEUBER KLAUS ,  KLEIN WILFRIED ,  NAJMANN KNUT ,  REMSHARDT ROLF

IPC: G11C11/41 ,  G11C11/413 ,  G11C11/415 ,  H03K19/088 ,  H03M7/00 ,  G11C7/00 ,  G11C11/40

Abstract: A method and circuit arrangement for operating an information store, in particular a monolithic information store, whose storage cells and address circuits comprise bipolar transistors which are not continuously subjected to full power. The monolithic information store is readily fabricated by known planar process technology, has increased density, has reduced read/write times, reduced cycle time, and reduced power dissipation.