Abstract:
In a monolithic semiconductor storage the bit lines are selectively connected in pairs to the inputs of a read amplifier. In their separated state the potentials of the read lines (VB) and of the associated input lines of the read amplifier (VBS1, VBS2) show the same value and are derived from a common potential (VH). Potentials VB as well as VBS1 and VBS2 are derived via the same respective number of diode voltage drops from potential VH.
Abstract:
This teaches a sense circuit for an integrated memory storage system in which the storage cell output is detected by a differential amplifier, controlling a flip-flop, serving as a latch, having load elements which also function as the load elements of the latch to ensure an optimum power and speed product. The latch can be coupled to an output driver circuit through a current switch which shares common elements with the latch to assure that the latch remains symmetrical even when used with an output driver having asymmetrical control.
Abstract:
A method and circuit arrangement for operating an information store, in particular a monolithic information store, whose storage cells and address circuits comprise bipolar transistors which are not continuously subjected to full power. The monolithic information store is readily fabricated by known planar process technology, has increased density, has reduced read/write times, reduced cycle time, and reduced power dissipation.