公开(公告)号：DE3687425T2

公开(公告)日：1993-07-15

申请号：DE3687425

申请日：1986-04-16

Applicant: IBM

Inventor： FREEOUF JOHN LAWRENCE ,  JACKSON THOMAS NELSON ,  KIRCHNER PETER DANIEL ,  TANG JEFFREY YUH-FONG ,  WOODALL JERRY MACPHERSON

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/68 ,  H01L29/737 ,  H01L29/76

Abstract: The composition and doping profile of the emitter (4) produces an electron gas (16) in the base (3) adjacent a band offset heterojunction interface between the emitter and the base. When a suitable bias is applied, the electron gas is confined adjacent to the interface by a low barrier (produced by layer 10). The kinetic energy of ballistic electrons crossing the base to the collector (2) is controlled to prevent intervalley scattering by an electrostatic barrier (7) that under influence of bias provides an essentially level conduction band in the portion of the base adjacent the collector.

公开(公告)号：DE3382340D1

公开(公告)日：1991-08-22

申请号：DE3382340

申请日：1983-08-02

Applicant: IBM

Inventor： FREEOUF JOHN LAWRENCE ,  JACKSON THOMAS NELSON ,  LAUX STEVEN ERIC ,  WOODALL JERRY MAC PHERSON

IPC: H01L29/80 ,  H01L21/338 ,  H01L29/772 ,  H01L29/812

Abstract: A semiconductor device employing two-dimensional space charge modulation in a semiconductor body 1 has an approximately Debye length wide ohmic contact 3 and a rectifying contact 2 positioned within a Debye length of the contact 3. Electrical conduction between the contact 3 and a remotely positioned contact 4 is controlled by the potential applied to the rectifying contact 2.

公开(公告)号：DE3379091D1

公开(公告)日：1989-03-02

申请号：DE3379091

申请日：1983-02-01

Applicant: IBM

Inventor： JACKSON THOMAS NELSON ,  WOODALL JERRY MAC PHERSON

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/338 ,  H01L29/205 ,  H01L29/76 ,  H01L29/778 ,  H01L29/80 ,  H01L29/812 ,  H01L29/10 ,  H01L29/72

Abstract: A majority carrier ballistic conduction transistor is fabricated with a built-indifference in barrier height ( DIAMETER a, DIAMETER b) between the emitter/base and collector/base interfaces by employing surface Fermi level pinning in a crystalline structure with three coplanar regions of different semiconductor materials. The central region base 3 has a thickness of the order of the mean free path of en electron. The materials of the external regions (2, 4) are such that there is a mismatch between the crystal spacing of the external regions and the central region which causes the Fermi level of the material in the central region to be pinned in the region of the conduction band at the interfaces with the external regions and the material of the external regions is selected so that the surface Fermi level is pinned in the forbidden region. A monocrystalline structure having an emitter region (2) of GaAs, a base region (3) of InAs or W 100Ato 500Athick and a collector region (4) of GainAs provides switching in the range of 10 seconds.

公开(公告)号：DE3376712D1

公开(公告)日：1988-06-23

申请号：DE3376712

申请日：1983-12-06

Applicant: IBM

Inventor： CHAPPELL TERRY IVAN ,  JACKSON THOMAS NELSON ,  WOODALL JERRY MACPHERSON

IPC: H01L31/10 ,  H01L27/144 ,  H01L31/0352 ,  H01L31/101 ,  H01L31/109 ,  H01L27/14 ,  H01L31/02 ,  H01L31/06

Abstract: A photodiode consists of an undoped light-absorbing region contiguous with one doped region of a pair of doped regions forming a quantum mechanical tunnelling pn junction having a thickness of the order of the mean free path of an electron. A number of the photodiodes are integrated in series with the light absorbing regions being progressively thicker with distance from an incident light receiving surface. For maximum effectiveness with monochromatic light, the thickness and doping of the regions are tailored to produce similar quantities of carriers from the light. A nine section GaAs structure with 50 ANGSTROM thick n and p tunnelling junction regions has a 90% quantum efficiency and delivers a 5 volt output with a 0.35 picosecond transit time.

公开(公告)号：DE3783162T2

公开(公告)日：1993-07-01

申请号：DE3783162

申请日：1987-05-26

Applicant: IBM

Inventor： JACKSON THOMAS NELSON ,  MURAKAMI MASANORI ,  PRICE WILLIAM HENRY ,  TIWARI SANDIP ,  WOODALL JERRY MAC PHERSON ,  WRIGHT STEVEN LORENZ

IPC: H01L21/20 ,  H01L21/28 ,  H01L29/43 ,  H01L29/45 ,  H01L29/40 ,  H01L29/20

公开(公告)号：DE3685842D1

公开(公告)日：1992-08-06

申请号：DE3685842

申请日：1986-04-11

Applicant: IBM

Inventor： JACKSON THOMAS NELSON ,  KIRCHNER PETER DANIEL ,  PETTIT GEORGE DAVID ,  RUTZ RICHARD FREDERICK ,  WOODALL JERRY MACPHERSON

IPC: H01L21/338 ,  H01L21/28 ,  H01L21/285 ,  H01L29/41 ,  H01L29/43 ,  H01L29/45 ,  H01L29/80 ,  H01L29/812

Abstract: An ohmic contact is formed to a device region in the surface of an extrinsic conductivity type group III-V semiconductor crystal (1) by providing a layer (3) of an amphoteric dopant on the surface of the crystal and providing in that layer, at the desired location of the ohmic contact, a localised quantity of atoms of the element of the crystal which is capable of imparting with the amphoteric dopant the aforesaid extrinsic conductivity type, and heating the structure to diffuse atoms from the layer into the surface of the crystal to form the ohmic contact. A layer of Si on GaAs upon heating normally forms a rectifying contact. If a region of the Si layer contains As atoms, an ohmic contact is formed on heating.

公开(公告)号：CA1247754A

公开(公告)日：1988-12-28

申请号：CA502699

申请日：1986-02-25

Applicant: IBM

Inventor： JACKSON THOMAS NELSON ,  KIRCHNER PETER DANIEL ,  PETTIT GEORGE DAVID ,  RUTZ RICHARD FREDERICK ,  WOODALL JERRY MACPHERSON

IPC: H01L21/338 ,  H01L21/28 ,  H01L21/285 ,  H01L29/41 ,  H01L29/43 ,  H01L29/45 ,  H01L29/80 ,  H01L29/812 ,  H01L21/72 ,  H01L27/04

Abstract: GROUP III-V SEMICONDUCTOR ELECTRICAL CONTACT A layer of an amphoteric dopant on the surface of a group III-V intermetallic semiconductor crystal will diffuse into the crystal surface in a heating cycle forming a stable contact. The contact can be ohmic or rectifying depending on the localized presence of an excess of one crystal ingredient. A layer of Si on GaAs upon heating forms a rectifying contact. When the layer of Si contains As, the contact is ohmic.

公开(公告)号：DE3560644D1

公开(公告)日：1987-10-22

申请号：DE3560644

申请日：1985-05-17

Applicant: IBM

Inventor： FREEOUF JOHN LAWRENCE ,  JACKSON THOMAS NELSON

IPC: C30B23/08 ,  C23C14/24 ,  C23C14/26 ,  C23C14/56 ,  C30B23/06 ,  C30B25/08 ,  H01L21/203

Abstract: In a molecular beam epitaxy furnace, a heater is described for heating the interior of an effusion cell. The heater includes an outer cylindrical sleeve having one end connected to receive a vacuum, and an opposite end extending into the furnace. An inner sleeve is provided coaxial with the outer cylindrical sleeve, one end of the inner sleeve being sealed with the opposite end of the cylindrical sleeve. The inner sleeve extends along a portion of the outer cylindrical sleeve providing an interior vacuum chamber. A heating element is disposed between the cylindrical sleeve and inner sleeve which heats the interior crucible receiving chamber and a crucible therein bearing semiconductor constituent material such that the semiconductor constituent material effuses without contamination from the heating element.

公开(公告)号：DE3372431D1

公开(公告)日：1987-08-13

申请号：DE3372431

申请日：1983-01-21

Applicant: IBM

Inventor： JACKSON THOMAS NELSON ,  WOODALL JERRY MAC PHERSON

IPC: H01S5/00 ,  H01L33/00 ,  H01S5/028 ,  H01S3/08

Abstract: Degradation of the cleaved light output surface of a semiconductor crystal injection laser is reduced through control of surface recombination by providing an annealed optically transparent coating at least one ingredient of which has a higher bandgap than said crystal over the cleaved light output surface. Crystals of GaAs, GaAlAs and GaInAsP are provided with annealed coatings of ZnS, CdS, CdTe and CdSe.

公开(公告)号：DE3369427D1

公开(公告)日：1987-02-26

申请号：DE3369427

申请日：1983-10-05

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  JACKSON THOMAS NELSON ,  RUPPRECHT HANS STEPHAN ,  WOODALL JERRY MACPHERSON

IPC: C30B29/40 ,  C30B31/22 ,  H01L21/265 ,  H01L21/314 ,  H01L21/324

Abstract: Implanted impurity ions are activated in a compound semiconductor crystal wafer (1, 3), such as GaAs over a broad integrated circuit device area (4) by providing a uniform solid layer (5) (eg 10 ANGSTROM to 500 ANGSTROM thick) of the most volatile element of the compound over the surface (2) of the device area (4) and annealing the crystal wafer at a temperature of 800 DEG C to 900 DEG C for a period of 1 to 20 seconds. … The layer (5) of the most volatile element may either be formed on a backing substrate (6) or formed as a coating on the surface (2) of the crystal wafer (1, 3).