公开(公告)号：JP2007294952A

公开(公告)日：2007-11-08

申请号：JP2007104499

申请日：2007-04-12

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： STEVEN ALAN CORDES ,  KNICKERBOCKER JOHN U ,  SPEIDELL JAMES L ,  GRUBER PETER ALFRED

IPC: H01L21/60

CPC classification number: B23K3/0638 ,  B23K1/20 ,  B23K2201/40 ,  H01L24/11 ,  H01L24/742 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a system, a method, and an apparatus for injection molding of a conductive boding material to a plurality of cavities on surface. SOLUTION: This method includes a step of aligning a filling head with the surface. A mold includes the plurality of cavities. This method further includes allowing the fill head to substantially contact the surface and arranging it. At least a first gas is flown through a channel about a first region of the filling head. At least the first gas has a temperature higher than a melting point of the conductive bonding material in a reservoir, thereby maintaining the conductive bonding material in a molten state. The conductive bonding material is forced from the fill head toward the surface. The conductive bonding material is provided to at least any one of the plurality of cavities simultaneously while the at least one cavity approximates to the filling head. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于将导电编码材料注射成型到表面上的多个空腔的系统，方法和装置。 解决方案：该方法包括将填充头与表面对齐的步骤。 模具包括多个空腔。 该方法还包括允许填充头基本上接触表面并进行排列。 至少第一气体围绕填充头的第一区域流过通道。 至少第一气体的温度高于储存器中的导电接合材料的熔点，从而保持导电接合材料处于熔融状态。 导电接合材料从填充头朝向表面被迫动。 导电接合材料同时被提供到多个空腔中的至少任一个，同时至少一个空腔近似于填充头。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2000236051A

公开(公告)日：2000-08-29

申请号：JP2000028596

申请日：2000-02-07

Applicant: IBM

Inventor： L WIN HERON ,  SUSHUMUNA IRUVANTEI ,  KNICKERBOCKER JOHN U ,  REEDO SHERIF

IPC: H01L23/36 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To improve cooling of an electronic circuit chip by providing a part whose one side is a practically flat plate and the other side extends outward as it is near at least a single central part. SOLUTION: A heat dissipation device 10 comprises a protrusion 15 which extends outward forming a solder layer 20 of a variable thickness. The solder layer 20 becomes thin as it is really near a central part of a boss 15. The solder layer 20 becomes thick in its outward extension direction from a central part of the boss 15. A metallization layer 21 is provided for providing proper adhesion between a chip 30 and the solder layer 20. The chip 30 is fixed to a substrate 40 by what is called flip-chip constitution. The substrate 40 comprises mutual connection which provides electrical circuit coupling between each part of the chip 30 and a pin 45. The chip 30 is fixed in mutual connection on a substrate 40 by solder hole technique, etc.

公开(公告)号：JPH1140047A

公开(公告)日：1999-02-12

申请号：JP12436698

申请日：1998-05-07

Applicant: IBM

Inventor： KNICKERBOCKER JOHN U ,  HUMENIK JAMES N ,  KNOX ANDREW R ,  ROSENBERG ROBERT

IPC: H01J3/00 ,  H01F7/02 ,  H01F41/16 ,  H01J1/46 ,  H01J9/14 ,  H01J29/46 ,  H01J29/68 ,  H01J31/12

Abstract: PROBLEM TO BE SOLVED: To form a magnet by forming apertures in a metal sheet, fixing at least one ferrite layer on the first surface, fixing at least one dielectric layer on the second surface, and forming apertures which partially overlap with the apertures of the metal sheet through the ferrite layers and the dielectric layers. SOLUTION: A photoresist is detached from a metal sheet 105. Etched metal sheet 105 is examined, and it can be confirmed that all of apertures 65 exist and dimensional tolerance and positional tolerance of the apertures are met. The metal sheet 105 needs to be formed so that adhesion of the metal sheet 105 itself to the following ferrite layers 15 or the dielectric layers 13 or both of them is strengthened. The ferrite layers 15 are formed by generating slurry moldable as a thin ferrite-sheets by combining a ferrite material, glass powder, an organic binder, a solvent, and a vehicle. At the same time, a dielectric material, as slurry, is converted into the dielectric layers 13.

公开(公告)号：JP2010263205A

公开(公告)日：2010-11-18

申请号：JP2010096609

申请日：2010-04-20

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KATOPIS GEORGE A ,  BUCHWALTER STEPHEN L ,  TSAPEPAS STELIOS G ,  KNICKERBOCKER JOHN U ,  PAUL S ANDRY ,  WEBB BUCKNELL C

IPC: H01L23/12 ,  H01L23/32

CPC classification number: H01L23/49827 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/00 ,  H01L2224/05552

Abstract: PROBLEM TO BE SOLVED: To provide an interposer substrate assembly such that an integrated circuit chip can be reworked, and to provide an electronic device assembly and a method of manufacturing them. SOLUTION: A substrate 310 is fabricated of a material having a first thermal expansivity; and an interposer 330 is fabricated of a material having a second thermal expansivity different from the first expansivity. There is a coefficient of thermal expansion mismatch between the substrate 310 and the interposer 330 or chip 320. The interposer 330 is coupled to the substrate 310 via a first plurality of electrical contacts 315 and an underfill adhesive 316 at least partially surrounding the electrical contacts 315 to bond the interposer 330 to the substrate 310, thereby reducing strain applied on the first electrical contacts 315. The integrated circuit chip 320 is coupled to the interposer 330 via a second plurality of electrical contacts 325 without use of an adhesive surrounding the second plurality of electrical contacts 325. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种插入器基板组件，使得可以对集成电路芯片进行返工，并提供电子器件组件及其制造方法。 解决方案：衬底310由具有第一热膨胀性的材料制成; 并且插入件330由具有不同于第一扩展性的第二热膨胀性的材料制成。 衬底310和插入器330或芯片320之间存在热膨胀失配系数。插入器330经由第一多个电触点315和底部填充粘合剂316耦合到衬底310，至少部分地围绕电触头315 以将内插器330接合到基板310，从而减小施加在第一电触点315上的应变。集成电路芯片320经由第二多个电触点325而耦合到插入器330，而不使用围绕第二多个 电触点325.版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2006059814A

公开(公告)日：2006-03-02

申请号：JP2005238111

申请日：2005-08-19

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BERNIER WILLIAM E ,  CHENG TIEN-JEN ,  COLE MARIE S ,  EICHSTADT DAVID E ,  FAROOQ MUKTA G ,  PHIZHIMONS JOHN A ,  LEWIS S GOLDMAN ,  KNICKERBOCKER JOHN U ,  LOPEZ TASHA E ,  WELSH DAVID J

IPC: H01R11/01

CPC classification number: H01L21/563 ,  H01L23/3171 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/10126 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13566 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01R43/0256 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/0133 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide a connector surrounded with a compressive material which connects a device with a support without separation.
SOLUTION: An unleaded connector is formed on the device, the unleaded connector is surrounded with a compressive film, the device is combined with the support, i.e. the unleaded connector connects the device with the support electrically, and a clearance between the support and the device is filled with an insulation underfill. A device supporting structure constituted of these and a forming method for it are disclosed.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种被压缩材料包围的连接器，该压缩材料将装置与支撑件连接而不分离。 解决方案：在设备上形成无铅连接器，无铅连接器被压缩膜包围，该装置与支撑件组合，即，无铅连接器将该装置与支撑件电连接，支撑件之间的间隙 并且该装置填充有绝缘底部填充物。 公开了一种由它们构成的装置支撑结构及其形成方法。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2000223819A

公开(公告)日：2000-08-11

申请号：JP2000006956

申请日：2000-01-14

Applicant: IBM

Inventor： PETER JEFFREY ,  SHAJII FAULK ,  KNICKERBOCKER JOHN U ,  SCOTT AIRA RANZENTAARU ,  SUDEIPITA KUMER ROY ,  KATHRYN ANN SATARUTAA

IPC: B23K1/00 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H05K3/24 ,  H05K3/30 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To provide a method for assembling an electronic module equipped with an improved solder interconnection part by overcoming the nonflatness of electronic constituent elements. SOLUTION: A chip 20 has a conic solder joint part 26 and a trapezoidal solder joint part 36. A coining tool 30 having a heating coil 32 has a cavity 34 for forming part of a solder preform in a conic shape. The cavity 37 is formed in the conic shape so as to coin the solder preform in a truncated-cone shape. The truncated-cone shaped solder preform which is thus obtained stands off while an electronic module is assembled so as to control the breakage of the conic solder preform. The solder preform is adaptive to the opposite surface of a chip or substrate at different height, so it is adaptive to nonflatness that the surfaces of the chip and substrate typically have.

公开(公告)号：JPH11274407A

公开(公告)日：1999-10-08

申请号：JP3290499

申请日：1999-02-10

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレイション

Inventor： MAKUTA S FALUKE ,  FAROOQ SHAJI ,  HARVEY C HAMMEL ,  KNICKERBOCKER JOHN U ,  ROBERT A LITA ,  HERBERT I STOLER

IPC: H01L27/04 ,  H01G4/30 ,  H01G4/33 ,  H01L21/02 ,  H01L21/822

CPC classification number: H01L28/40 ,  H01G4/306 ,  Y10T29/435

Abstract: PROBLEM TO BE SOLVED: To provide an electronic component structure in which an interposer thin film capacitor structure is used between an electronic component and a multilayered circuit card. SOLUTION: In order to prevent the occurrence of fatal electric short circuits in an upper thin film area due to pits, voids, undulations on the surface of a substrate, a first metallic layer 5 having a thickness of about 0.5 μm to 10 μm is formed on the substrate and a thin film containing a dielectric film 6 and a second metallic film is formed on the metallic layer 5. The first metallic layer 5 is composed of Pt, another electrode metal, or a combination of Pt, Cr, Cu metal, and a diffusion barrier layer. In order to increase the adhesive power of the layer 5, an additional Ti layer can be used. The thicknesses of the Cr layer, Cu layer, diffusion barrier layer, and Pt layer constituting the first metallic layer 5 are respectively adjusted to about 200 Å, between about 0.5 μm and about 10 μm, between about 1,000 Å and about 5,000 Å and between about 100 Å and about 2,500 Å.

Abstract translation: 要解决的问题：提供一种在电子部件和多层电路卡之间使用中介层薄膜电容器结构的电子部件结构。 解决方案：为了防止由于基板表面上的凹坑，空隙，波纹引起的上部薄膜区域中的致命电短路，形成厚度为约0.5μm至10μm的第一金属层5 在金属层5上形成含有介电膜6和第二金属膜的薄膜。第一金属层5由Pt，另一种电极金属或Pt，Cr，Cu金属， 和扩散阻挡层。 为了增加层5的粘合力，可以使用另外的Ti层。 构成第一金属层5的Cr层，Cu层，扩散阻挡层和Pt层的厚度分别调节为约200，约0.5μm和约10μm之间，介于约至约5000之间和介于 约100埃和约2,500埃。

公开(公告)号：GB2520905A

公开(公告)日：2015-06-03

申请号：GB201506267

申请日：2013-09-20

Applicant: IBM

Inventor： ANDRY PAUL S ,  BUDD RUSSELL A ,  KNICKERBOCKER JOHN U ,  TRZCINSKI ROBERT E ,  TULIPE DOUGLAS C LA JR

IPC: H01L21/683

Abstract: A method for processing a semiconductor wafer includes applying a release layer to a transparent handler (S11). An adhesive layer, that is distinct from the release layer, is applied between a semiconductor wafer and the transparent handler having the release layer applied thereon (S12). The semiconductor wafer is bonded to the transparent handler using the adhesive layer (S13). The semiconductor wafer is processed while it is bonded to the transparent handler (S14). The release layer is ablated by irradiating the release layer through the transparent handler with a laser (S16). The semiconductor wafer is removed from the transparent handler (S17).

公开(公告)号：ES2253697T3

公开(公告)日：2006-06-01

申请号：ES03750726

申请日：2003-08-28

Applicant: IBM

Inventor： KNICKERBOCKER JOHN U ,  JACOBOWITZ LAWRENCE ,  LUIJTEN RONALD P ,  SHINDE SUBHASH L

IPC: G02B6/42 ,  G02B6/43

Abstract: Una estructura de montaje óptico para la conexión de una serie de áreas bidimensionales de matrices de VCSEL a un cuadro, que comprende: una matriz de VCSEL (10) que contiene dicha serie de áreas de VCSEL (15-i), estado rodeada dicha serie de áreas por una costura de adhesión metalizada (12) sobre una superficie superior de la misma; una unidad de transferencia óptica de precisión (20) que contiene una costura de adhesión (22) correspondiente sobre su parte inferior que corresponde a dicha costura de adhesión metalizada (12) sobre dicha matriz de VCSEL (10), estando dispuesta dicha costura (22) correspondiente sobre la parte inferior de un reborde (23), de manera que la alineación entre dicha matriz (10) y dicha unidad de transferencia óptica (20) es proporcionada por el reborde (23) que está adaptado para formar un borde vertical (13) de un escalón que es decapado en la parte superior de la matriz (10); y una primera serie de salientes (24) sobre una superficie superior de dicha unidad detransferencia óptica (20); conteniendo dicha unidad de transferencia óptica (20) medios de transferencia óptica (25-i) para transferir radiación emitida desde dicha serie de áreas de VCSEL (15- i), por lo que la limitación de la tolerancia para dichos medios de transferencia óptica (25-i) es 10 m, y la limitación de la tolerancia para la distancia vertical entre dichos medios de transferencia óptica (25-i) y dicha matriz de VCSEL (10) es 50 m; y un conector óptico (30) enchufable que tiene una unidad de transmisión óptica (35) insertada en una cavidad del mismo, una serie de receptáculos de interbloqueo (34) sobre una superficie inferior del mismo que coincide con dicha primera serie de salientes (24) sobre dicha superficie superior de dicha unidad de transferencia óptica (20) y una segunda serie de salientes (36) sobre una superficie superior de dicho conector óptico (30) enchufable para coincidencia con dicho cuadro.

公开(公告)号：DE60303140T2

公开(公告)日：2006-08-31

申请号：DE60303140

申请日：2003-08-28

Applicant: IBM

Inventor： KNICKERBOCKER JOHN U ,  JACOBOWITZ LAWRENCE ,  LUIJTEN RONALD P ,  SHINDE SUBHASH L

IPC: G02B6/42 ,  G02B6/43

Abstract: A set of interlocking modules supports and connects a die containing lasers, a set of precision molded lenses and a set of beam switching elements. Another embodiment of the invention is a structure for mounting a logic chip and an optical chip on a chip carrier, with the optical chip being mounted on the side of the carrier facing the system board on which the carrier is mounted, so that radiation travels in a straight path from optical sources on the optical chip into optical transmission guides on the board.