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    11.
    发明专利
    未知

    公开(公告)号：DE69231310T2

    公开(公告)日：2001-02-15

    申请号：DE69231310

    申请日：1992-10-12

    Applicant: IBM

    Inventor： CRABBE EMMANUEL F ,  HARAME DAVID L ,  MEYERSON BERNARD S ,  PATTON GARY ,  STORK JOHANNES M C

    IPC: H01L29/73 ,  H01L21/331 ,  H01L29/165 ,  H01L29/737

    Abstract: A heterojunction bipolar transistor having a single-crystal emitter with reduced charge storage and acceptable current gain is described herein. The heterojunction transistor comprises a collector region (604), a base region (606) formed on the collector region, and a single-crystal emitter region (608) grown on the base region (606) by low temperature epitaxy. During the formation of the base region (606), a graded profile of 5-23% germanium is added to the base, as the distance to the collector region (604) decreases, thereby decreasing the base bandgap as it approaches the collector region. Further, during the formation of the emitter region (608), a graded profile of 0-20% germanium is added to the emitter as the distance from the emitter-base junction increases. Thus, the emitter bandgap decreases as it moves farther from the emitter-base junction. The result of the above grading profiles is that the emitter bandgap is narrower at the emitter contact than the base bandgap at the emitter-base junction.

    X-RAY MASK SUBSTRATE AND METHOD OF FABRICATION THEREOF
    15.
    发明专利
    X-RAY MASK SUBSTRATE AND METHOD OF FABRICATION THEREOF 未知

    公开(公告)号：CA1191477A

    公开(公告)日：1985-08-06

    申请号：CA426785

    申请日：1983-04-27

    Applicant: IBM

    Inventor： BRADY MICHAEL J ,  MEYERSON BERNARD S ,  WARLAUMONT JOHN M

    IPC: C01B33/02 ,  G03F1/22 ,  H01L21/027 ,  G21F3/00 ,  C23C14/04 ,  C23C16/28

    Abstract: X-RAY MASK SUBSTRATE AND METHOD OF FABRICATION THEREOF An improved X-ray lithography mask has been fabricated by forming an X ray absorbing lithography pattern on a supporting foil of hydrogenated amorphous carbon. The substrate foil is formed by depositing a carbon film in the presence of hydrogen onto a surface having a temperature below 375.degree.C. The hydrogen concentration is maintained sufficiently high that the resulting film has at least one atom percent of hydrogen. A film having about 20 atom percent of hydrogen is preferred. While impurities are permitted, impurities must be maintained at a level such that the optical bandgap of the resulting film is at least one electron volt. A film with an optical bandgap of about 2 electron volts is preferred.

    16.
    发明专利
    未知

    公开(公告)号：DE69838307D1

    公开(公告)日：2007-10-11

    申请号：DE69838307

    申请日：1998-01-16

    Applicant: IBM

    Inventor： ISMAIL KAHLID EZZELDIN ,  MEYERSON BERNARD S

    IPC: H01L29/80 ,  H01L29/808 ,  H01L21/337 ,  H01L29/10

    Abstract: A junction field effect transistor comprises a lightly doped second semiconductor layer (16) over a first semiconductor layer of the same dopant type (14), a third semiconductor layer of opposite type (18) having an opening (24) and a dielectric layer (20) having an opening above the first opening. A fourth semiconductor layer of first type Si1-x Gex, where x increases with thickness is formed in the opening (30) and a fifth layer of first type Si1-y Gey, where y is constant with thickness, is also formed in the opening of the third layer (34). A sixth such layer of Si1-zGez, where z decreases with thickness, (38) is formed in the opening of the dielectric layer. Also claimed is a method of forming the JFET above by sequentially forming the layers and openings as above.

    17.
    发明专利
    未知

    公开(公告)号：DE69232749T2

    公开(公告)日：2003-08-07

    申请号：DE69232749

    申请日：1992-06-03

    Applicant: IBM

    Inventor： DENNARD ROBERT H ,  MEYERSON BERNARD S ,  ROSENBERG ROBERT

    IPC: H01L27/12 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/762 ,  H01L21/76 ,  H01L21/306

    Abstract: A method for fabricating silicon on insulator structures having a dislocation free silicon layer. The method utilizes low temperature UHVCVD to deposit a very heavily doped etch stop layer (12) having a very steep doping profile onto a substrate (10) and a lightly doped active layer (14) onto the etch stop layer. An insulator (16) is formed on the active layer and a carrier wafer (18) is formed on the insulator layer. The original substrate is removed in a first etch and the etch stop layer is removed in a second etch resulting in a thin, uniform active layer. In one embodiment, a small percentage of germanium is added to the etch stop layer to produce a defect free epitaxial active layer.

    18.
    发明专利
    未知

    公开(公告)号：DE69231310D1

    公开(公告)日：2000-09-07

    申请号：DE69231310

    申请日：1992-10-12

    Applicant: IBM

    Inventor： CRABBE EMMANUEL F ,  HARAME DAVID L ,  MEYERSON BERNARD S ,  PATTON GARY ,  STORK JOHANNES M C

    IPC: H01L29/73 ,  H01L21/331 ,  H01L29/165 ,  H01L29/737

    Abstract: A heterojunction bipolar transistor having a single-crystal emitter with reduced charge storage and acceptable current gain is described herein. The heterojunction transistor comprises a collector region (604), a base region (606) formed on the collector region, and a single-crystal emitter region (608) grown on the base region (606) by low temperature epitaxy. During the formation of the base region (606), a graded profile of 5-23% germanium is added to the base, as the distance to the collector region (604) decreases, thereby decreasing the base bandgap as it approaches the collector region. Further, during the formation of the emitter region (608), a graded profile of 0-20% germanium is added to the emitter as the distance from the emitter-base junction increases. Thus, the emitter bandgap decreases as it moves farther from the emitter-base junction. The result of the above grading profiles is that the emitter bandgap is narrower at the emitter contact than the base bandgap at the emitter-base junction.

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