公开(公告)号：DE69715523D1

公开(公告)日：2002-10-24

申请号：DE69715523

申请日：1997-06-11

Applicant: IBM

Inventor： LAUFFER JOHN M ,  PAPATHOMAS KONSTANTINOS

IPC: H05K1/16 ,  H05K3/42 ,  H05K3/46

Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.

公开(公告)号：DE69329537T2

公开(公告)日：2001-06-07

申请号：DE69329537

申请日：1993-07-30

Applicant: IBM

Inventor： BANTU NAGESCHWER R ,  KEESLER ROSS W ,  SINCLAIR TERRY D ,  BHATT ANILKUMAR C ,  PAPATHOMAS KONSTANTINOS ,  WAGNER JEROME J

IPC: B01D3/00 ,  C07D317/36 ,  G03F7/30 ,  G03F7/42 ,  H01L21/02 ,  H01L21/027 ,  H01L21/30

公开(公告)号：PL337808A1

公开(公告)日：2000-09-11

申请号：PL33780898

申请日：1998-06-12

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  KLODOWSKI MICHAEL JOSEPH ,  PAPATHOMAS KONSTANTINOS ,  WILCOX JAMES ROBERT

IPC: H01L21/60 ,  H01L21/54 ,  H01L21/56 ,  H01L23/31

Abstract: The electrical connections of an integrated circuit chip assembly comprised of an integrated circuit chip attached to a substrate are encapsulated and reinforced with a high viscosity encapsulant material by dispensing the encapsulant material through an opening in the substrate into the space between the integrated circuit chip and the substrate. An integrated circuit chin assembly having a reinforced electrical interconnection which is more resistant to weakening as a result of stress created by differences in coefficient of thermal expansion between the integrated circuit chip and the substrate to which the integrated circuit chip is attached is produced.

公开(公告)号：CZ9904697A3

公开(公告)日：2000-05-17

申请号：CZ469799

申请日：1998-06-12

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  KLODOWSKI MICHAEL JOSEPH ,  PAPATHOMAS KONSTANTINOS ,  WILCOX JAMES ROBERT

IPC: H01L21/56

CPC classification number: H01L2924/14

公开(公告)号：CZ469899A3

公开(公告)日：2000-05-17

申请号：CZ469899

申请日：1998-06-12

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  PAPATHOMAS KONSTANTINOS

IPC: H01L21/56 ,  H01L21/60 ,  H01L23/29 ,  H01L23/31

公开(公告)号：ID20490A

公开(公告)日：1998-12-31

申请号：ID980590

申请日：1998-04-20

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  PAPATHOMAS KONSTANTINOS

IPC: H01L21/56 ,  G06K7/00

Abstract: The electrical interconnections between an integrated circuit chip assembly are encapsulated and reinforced with a high viscosity encapsulant material in a single step molding process wherein a mold is placed over an integrated circuit chip assembly and encapsulant material is dispensed through an opening in the mold and forced around and under the integrated circuit chip by external pressure encapsulating the integrated circuit chip assembly. An integrated circuit chip assembly having a reinforced electrical connection which is more resistant to weakening as a result is stress created by differences in coefficient of thermal expansion between the integrated circuit chip and the substrate to which the integrated circuit chip is attached is produced.

公开(公告)号：MY132903A

公开(公告)日：2007-10-31

申请号：MYPI9802315

申请日：1998-05-25

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  PAPATHOMAS KONSTANTINOS

IPC: H01L23/28 ,  H01L21/56 ,  H01L21/60

Abstract: THE ELECTRICAL INTERCONNECTIONS BETWEEN AN INTEGRATED CIRCUIT CHIP ASSEMBLY ARE ENCAPSULATED AND REINFORCED WITH A HIGH VISCOSITY ENCAPSULANT MATERIAL IN A SINGLE STEP MOLDING PROCESS WHEREIN A MOLD IS PLACED OVER AN INTEGRATED CIRCUIT CHIP ASSEMBLY AND ENCAPSULANT MATERIAL IS DISPENSED THROUGH AN OPENING IN THE MOLD AND FORCED AROUND AND UNDER THE INTEGRATED CIRCUIT CHIP BY EXTERNAL PRESSURE ENCAPSULATING THE INTEGRATED CIRCUIT CHIP ASSEMBLY. AN INTEGRATED CIRCUIT CHIP ASSEMBLY HAVING A REINFORCED ELECTRICAL CONNECTION WHICH IS MORE RESISTANT TO WEAKENING AS A RESULT IS STRESS CREATED BY DIFFERENCES IN COEFFICIENT OF THERMAL EXPANSION BETWEEN THE INTEGRATED CIRCUIT CHIP AND THE SUBSTRATE TO WHICH THE INTEGRATED CIRCUIT IS ATTACHED IS PRODUCED.

公开(公告)号：DE69715523T2

公开(公告)日：2003-05-28

申请号：DE69715523

申请日：1997-06-11

Applicant: IBM

Inventor： LAUFFER JOHN M ,  PAPATHOMAS KONSTANTINOS

IPC: H05K1/16 ,  H05K3/42 ,  H05K3/46

Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.

公开(公告)号：DE69329537D1

公开(公告)日：2000-11-16

申请号：DE69329537

申请日：1993-07-30

Applicant: IBM

Inventor： BANTU NAGESCHWER R ,  KEESLER ROSS W ,  SINCLAIR TERRY D ,  BHATT ANILKUMAR C ,  PAPATHOMAS KONSTANTINOS ,  WAGNER JEROME J

IPC: B01D3/00 ,  C07D317/36 ,  G03F7/30 ,  G03F7/42 ,  H01L21/02 ,  H01L21/027 ,  H01L21/30

公开(公告)号：CZ469799A3

公开(公告)日：2000-05-17

申请号：CZ469799

申请日：1998-06-12

Applicant: IBM

Inventor： FARQUHAR DONALD SETON ,  KLODOWSKI MICHAEL JOSEPH ,  PAPATHOMAS KONSTANTINOS ,  WILCOX JAMES ROBERT

IPC: H01L21/56