Structurally reinforced ball grid array semiconductor packages and systems

    公开(公告)号:SG60129A1

    公开(公告)日:1999-02-22

    申请号:SG1997003775

    申请日:1997-10-17

    Applicant: IBM

    Abstract: Supporting structure for a ball grid array surface mounted integrated circuit device composed of support solder formed at selective corner locations on the ball grid array surface of the integrated circuit device. In one form, L-shaped patterns of high melting temperature solder are formed along the axes defined by the ball grid array and are characterized in that cross sections of the L-shaped pattern match that of the solder balls along one axis, and represent a continuum of solder between solder ball locations along the other axis. Support solder can be added where necessary to provide both structural reinforcement and thermal conduction. Control of the cross section of the support solder ensures that surface tension effects of the molten low temperature reflow solder used to connect the integrated circuit device does not materially change the final relative spacing between the integrated circuit device balls and the underlying printed circuit board contacts.

    12.
    发明专利
    未知

    公开(公告)号:DE69208415D1

    公开(公告)日:1996-03-28

    申请号:DE69208415

    申请日:1992-09-11

    Applicant: IBM

    Abstract: A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

    SUBSTRATE FOR INTEGRATED CIRCUIT PACKAGES

    公开(公告)号:DE3379820D1

    公开(公告)日:1989-06-08

    申请号:DE3379820

    申请日:1983-06-01

    Applicant: IBM

    Abstract: A method of preparing a conductor for solder bonding and a substrate to which this method may be applied. The method involves the use of three layers comprising a conductor layer 32, a barrier layer 33 and a solder wettable layer 35'. Solder bonds may be made to this solder wettable layer. During thermal cycling there may, in the absence of the barrier layer, be a tendency for material from the conductor layer to diffuse into the solder wettable layer and thence into the solder where it can form intermetallic alloys with Sn in the solder, causing the solder to become brittle and liable to failure. The inclusion of a barrier layer of suitable material, eg Cr or Co, reduces this diffusion and hence increases the reliability of the solder bonds. Optionally, the method includes provision for solderless bonding by thermocompression or ultrasonic bonding. This may be performed on the barrier layer at 37 or it may be performed elsewhere.

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