公开(公告)号：GB2454597B

公开(公告)日：2012-01-18

申请号：GB0821855

申请日：2008-12-01

Applicant: IBM

Inventor： HELMS MARKUS ,  SCHLIPF THOMAS ,  SENTLER DANIEL

IPC: H04L1/00 ,  G06F11/10 ,  G06F17/30

公开(公告)号：DE60142152D1

公开(公告)日：2010-07-01

申请号：DE60142152

申请日：2001-12-04

Applicant: IBM

Inventor： BAYER GERD KONRAD ,  ECKERT WOLFGANG ,  HELMS MARKUS ,  MAERGNER JUERGEN ,  RAISCH CHRISTOPH ,  SCHLIPF THOMAS ,  THEURICH KLAUS

IPC: G06F13/38 ,  H04L12/46

公开(公告)号：GB2461648A

公开(公告)日：2010-01-13

申请号：GB0913415

申请日：2009-08-03

Applicant: IBM

Inventor： SCHLIPF THOMAS ,  FRITZ ROLF ,  SMITH CHRISTOPHER S ,  MAYER ULRICH ,  LUNTEREN JAN VAN

IPC: G05B19/045

Abstract: A system stores an input compare vector in an input compare vector table. The system also stores an output vector, a next state value and a next state start address in an output vector, next state, next state address table. Each comparator compares each input compare vector from the input compare vector table and an external input vector, and outputs a selection signal to a multiplexer. The multiplexer associates the selection signals with an offset value, and provides the offset value to adder logic. The adder logic adds the offset value and an address from a current state start address register. A result of the addition is used as an address to access a row in the output vector, next state, next state address table. The accessed row has an output vector, a next state value and a next state start address corresponding to a current state and the external input vector.

公开(公告)号：GB2508343A

公开(公告)日：2014-06-04

申请号：GB201221364

申请日：2012-11-28

Applicant: IBM

Inventor： JUNGHANS SASCHA ,  KLEIN MATTHIAS ,  SCHLIPF THOMAS

IPC: G06F12/10 ,  G06F9/38 ,  G06F12/08 ,  G06F12/0864 ,  G06F12/1018

Abstract: A vector 102 is processed with an active hash function 104 and a test hash function 204. It is stored in an active hash table 108 and a test hash table 208. The test hash table is smaller than the active hash table. If the test function is more effective than the active function, the test function replaces the active function. The effectiveness of the hash function may be calculated by determining how many entries in the hash table a hash value matches. The hash functions may be implemented using configurable hash bit logic units, which each generate one bit of the hash value. In this case, the first function is replaced by reconfiguring the units. After replacement, a mask may be used to indicate which of the table entries were produced using the old function. The vector may be a computer memory address.

公开(公告)号：GB2461649A

公开(公告)日：2010-01-13

申请号：GB0913420

申请日：2009-08-03

Applicant: IBM

Inventor： SCHLIPF THOMAS ,  FRITZ ROLF ,  SMITH CHRISTOPHER S ,  MAYER ULRICH ,  LUNTEREN JAN VAN

IPC: G05B19/045

Abstract: Preventing a communication loop in communicating finite state machines by providing two tables, an output next state (OTNS) table and a communication output (COUT) table. The OTNS table is divided into two array data structures, an input compare vector (ICVT1) and an output next state next address table (ONNT). The COUT table is divided into two array data structures, an input compare vector (ICVT2) and a communication output table (COMCONT). Input compare vectors in the ICVT1 are retrieved and fed into comparators. The comparators compare the retrieved input compare vectors with an input signal. When a match is found, a corresponding comparator sets a corresponding selection signal to a pre-determined value to generate an offset value through a multiplexer. An adder adds the offset value and a value stored in a current state start address (CSSA) register, and generates an adding result. The adding result is used as an address to access a row in the ONNT. There is state transition information in that row of the ONNT.

公开(公告)号：GB2454598A

公开(公告)日：2009-05-13

申请号：GB0822217

申请日：2008-12-05

Applicant: IBM

Inventor： DORSCH RAINER ,  GRASSI MICHAEL ,  HELMS MARKUS ,  PANDEY KULWANT M ,  SCHLIPF THOMAS

IPC: H04L12/56

Abstract: An apparatus and method is disclosed for transferring data packets synchronously in a credit controlled manner from a transmitter (10, fig. 1, not shown) to a receiver (20,fig. 1), wherein the receiver transfers a credit to the transmitter and the transmitter transfers said packets to the receiver in response to said credit showing available buffer space in a data buffer (26,fig.1) of the receiver. The data buffer (26) is configured to comprise a virtually unlimited buffer space offering infinite credits. The receiver creates a credit signal (CI1, C12, CI3, C14, DC12, DCI3), which shows, independent from a physical size of the data buffer (26), a virtual buffer space giving credit for just one further data packet to be received at a time from the transmitter, and transfers the credit signal to the transmitter, wherein the receiver component sends a credit (e.g. CI1) for a following packet as soon as it starts receiving a current packet, but can delay sending the credit for a certain time (e.g. DC12, DC13) if conditions in the data buffer demand a delay. The delayed credit forces the transmitter to insert a gap (e.g. FG1, FG2) between packets. The timing of the normal credit CI1 ensures that through put is not compromised.

公开(公告)号：GB2454597A

公开(公告)日：2009-05-13

申请号：GB0821855

申请日：2008-12-01

Applicant: IBM

Inventor： HELMS MARKUS ,  SCHLIPF THOMAS ,  SENTLER DANIEL

IPC: H04L1/00 ,  G06F11/10 ,  G06F17/30

Abstract: In the prior art a received packet is stored as a linked list in a buffer memory as blocks 26 at a series of addressed memory locations 24 with pointers 28 to the next memory location. If an error occurs during readout the blocks can be incorrectly chained together, which would not normally be detected until the packet was processed, and some memory locations can be erroneously overwritten. The invention also stores a status flag 30 indicating start/final/only blocks within packet as well as valid/invalid blocks. Each block is also assigned a packet sequence number 32 and a block sequence number 34. By checking these values when each block is read out errors in the linked list can be quickly detected and erroneous deletion of data avoided.