中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

42 records (took 0.029 seconds)

    11.
    发明专利
    未知

    公开(公告)号：DE69932472D1

    公开(公告)日：2006-09-07

    申请号：DE69932472

    申请日：1999-05-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： TOBBEN DIRK ,  WEBER STEFAN J ,  BRINTZINGER AXEL

    IPC: H01L21/768 ,  H01L21/82 ,  H01L23/525

    Abstract: A method for forming a semiconductor integrated circuit having a fuse and an active device. A dielectric layer is formed over the fuse and over a contract region of the active device. Via holes are formed through selected regions of the dielectric layer exposing underlying portions of the fuse and underlying portions of a contact region of the active device. An electrically conductive material is deposited over the dielectric layer and through the via holes onto exposed portions of the fuse and the contact region. Portions of the electrically conductive material deposited onto the fuse are selectively removed while leaving portions of the electrically conductive material deposited onto the contact region of the active device. A fill material is disposed in the one of the fuse, a bottom portion of such filling material being spaced from the fuse.

    12.
    发明专利
    未知

    公开(公告)号：DE102004005022B4

    公开(公告)日：2006-02-16

    申请号：DE102004005022

    申请日：2004-01-30

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO ,  LEIBERG WOLFGANG

    IPC: H01L21/768 ,  H01L23/532 ,  H01L51/10 ,  H05K1/09 ,  H05K3/10 ,  H05K3/24

    Abstract: A method for fabricating a metallic conductor path with copper-nickel-gold layer structure, in which the copper core of the conductor path is electrically deposited on a copper seed layer (4) with a diffusion barrier arranged under it. Initially a dielectric mask (9) is formed so that the mask structure comprises the conductor path being fabricated, followed by extensive application of a copper-seed layer (4) carrying on the structure of the dielectric mask (9). A resist-mask is formed on the copper seed layer (4) by a first lithographic structuring of the positive resist, followed by galvanic deposition of the copper core (3) on the exposed copper seed layer (4). A second lithographic structuring of the resist mask follows, with subsequent application of nickel-gold-layer on the copper core (3) and removal of the resist mask and etching of the diffusion barrier (10) and the copper seed layer (4).

    13.
    发明专利
    未知

    公开(公告)号：DE102004026092A1

    公开(公告)日：2005-12-22

    申请号：DE102004026092

    申请日：2004-05-25

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO

    IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/60 ,  H01L23/31 ,  H01L23/525

    Abstract: A semiconductor device includes a semiconductor chip with a plurality of bonding pads at an upper surface and a passivation layer overlying the upper surface. A rewiring layer electrically coupling ones of the bonding pads to corresponding ones of a plurality of contact pads. The rewiring layer is formed by forming a first conductor and forming a covering layer of a precious metal over the first conductor. After forming the rewiring layer, a portion of the precious metal is removed from over the first conductor between the contact pads and bonding pads.

    15.
    发明专利
    未知

    公开(公告)号：DE10156054C2

    公开(公告)日：2003-11-13

    申请号：DE10156054

    申请日：2001-11-15

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL

    IPC: H01L23/52 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485

    Abstract: Method for fabricating an interconnect on a substrate. The method includes applying a mask on the substrate, patterning the mask, so that it has an opening corresponding to the interconnect, providing the interconnect in the opening on the substrate, widening the opening in order to uncover a region laterally adjoining the interconnect, encapsulating of interconnect in the widened opening, andremoving the mask.

    20.
    发明专利
    未知

    公开(公告)号：DE102004005361A1

    公开(公告)日：2005-09-01

    申请号：DE102004005361

    申请日：2004-02-03

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO

    IPC: H01L21/44 ,  H01L21/60 ,  H01L21/768 ,  H01L51/10 ,  H05K1/09 ,  H05K3/10 ,  H05K3/24 ,  H05K3/40

    Abstract: A process produces metallic interconnects and contact surfaces on electronic components using a copper-nickel-gold layer structure. The copper core of the interconnects and contact surfaces is deposited by electroplating by means of a first resist mask made from positive resist. The copper core of the interconnects and contact surfaces is surrounded by a nickel-gold layer by means of a second resist mask. The interconnects and contact surfaces are produced by means of two resist masks arranged one on top of the other, in such a way that the copper which forms the core of the interconnect is completely surrounded by the nickel-gold layer, which extends above the copper core, and an adjoining layer that extends beneath the copper core and comprises a diffusion barrier and seed layer.

Patent Agency Ranking