公开(公告)号：DE50207435D1

公开(公告)日：2006-08-17

申请号：DE50207435

申请日：2002-01-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FREITAG MARTIN ,  MIETHANER STEFAN ,  RABERG WOLFGANG

IPC: G11C11/16 ,  G11C11/15 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08

Abstract: A method for writing to the magnetoresistive memory cells of a MRAM memory, includes applying write currents respectively onto a word line and a bit line. A superposition of the magnetic fields generated by the write currents in each memory cell selected by the corresponding word lines and bits lines alter a direction of the magnetization thereof. According to the method, the write currents are applied in a chronologically offset manner, to the corresponding word line and the bit line whereby the direction of magnetization of the selected memory cell is rotated in several consecutive steps in the desired direction for writing a logical "0" or "1".

公开(公告)号：DE10055936C2

公开(公告)日：2003-08-28

申请号：DE10055936

申请日：2000-11-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FREITAG MARTIN ,  GOGL DIETMAR ,  LAMMERS STEFAN ,  HOENIGSCHMID HEINZ

IPC: H01L27/105 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/22 ,  H01L43/08 ,  G11C11/14 ,  G11C11/15

Abstract: The form of leads of a cell array of a multiplicity of magnetic memory cells is optimized by deviating from a square cross section of the leads in such a way that the magnetic field component of the write currents lying in the cell array plane decreases sufficiently rapidly with increasing distance from the crossover point. The cell array is constructed from a matrix of the column leads and the row leads.

公开(公告)号：DE10107380C1

公开(公告)日：2002-07-25

申请号：DE10107380

申请日：2001-02-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MIETHANER STEFAN ,  FREITAG MARTIN ,  RABERG WOLFGANG

IPC: G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08

Abstract: The write-in method has write-in currents applied to a word line and a bit line of the memory cell, for providing superimposed magnetic fields at the memory cell selected via the word line and the bit line resulting in an alteration in the magnetization direction. The write currents for the word line and the bit line are offset in time for rotation of the magnetization direction in several successive steps in one or other direction, for write-in of a logic 0 or 1. An Independent claim for a magnetoresistive memory is also included.

公开(公告)号：DE10053965A1

公开(公告)日：2002-06-20

申请号：DE10053965

申请日：2000-10-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOGL DIETMAR ,  LAMMERS STEFAN ,  FREITAG MARTIN ,  ROEHR THOMAS

IPC: G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

Abstract: The arrangement has memory cells in a field in at least one plane at intersection points between word or programming lines and bit lines. Providing programming currents to word and bit lines corresponding to a selected cell causes stray magnetic fields in adjacent cells. The method involves feeding a compensation current to the adjacent cell word, programming, bit or special line to produce a compensation magnetic field countering the stray field. The MRAM arrangement has memory cells (11-13) in a memory cell field in at least one plane at intersection points between word lines (WL1) or programming lines and bit lines (BL1-BL3). Providing programming currents to word and bit lines corresponding to a selected cell causes stray magnetic fields in adjacent cells. The method involves feeding a compensation current to the word line or programming line or bit line or a special line of the adjacent cell(s) to produce a compensation magnetic field countering the stray field.