公开(公告)号：DE10346460A1

公开(公告)日：2005-05-19

申请号：DE10346460

申请日：2003-10-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO ,  WALLIS DAVID ,  LEIBERG WOLFGANG

IPC: H01L21/82 ,  H01L23/28 ,  H01L23/525 ,  H01L29/00

Abstract: An arrangement for protecting fuses/anti-fuses on chips, which activate redundant circuits or chip functions, comprises a pacifying layer on the finally processed chip. A dielectric (3.1,3.2) covers the pacifying layer (5) over the fuse/anti-fuse (4) area. A redistribution layer (2) composed of Cu/Ni/Au is located on the dielectric. The dielectric consists of metal oxide.

公开(公告)号：DE10000004A1

公开(公告)日：2001-05-17

申请号：DE10000004

申请日：2000-01-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LEIBERG WOLFGANG ,  BAUCH LOTHAR ,  GRANDREMY GREGOIRE ,  STEINBACH ANDREAS ,  BRASE GABRIELA

IPC: H01L21/768 ,  H01L21/283

Abstract: Production of conducting pathways comprises applying a metal layer (1) to a substrate with integrated circuits; applying an insulating layer (2) to the metal layer; producing a TiN layer (3) and subsequently a photoresist layer (5); producing a first resist mask by forming a first hole pattern in the photoresist layer; removing the TiN layer exposed in openings (6) and the insulating layer underneath; removing the photoresist layer and the TiN layer; and depositing metal in the trenches and contact holes. An Independent claim is also included for a process for the production of the conducting pathways. Preferred Features: An anitreflection layer formed by a SION layer (4) is arranged between the photoresist layer and the TiN layer. The TiN layer is applied using a reactive plasma sputtering process.