公开(公告)号：DE10323185A1

公开(公告)日：2004-12-16

申请号：DE10323185

申请日：2003-05-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHEDEL THORSTEN ,  HOMMEN HEIKO ,  SCHUMACHER KARL ,  STAECKER JENS

IPC: G03F7/20 ,  G03F7/207 ,  G03F9/02

Abstract: The marker includes a number of rectangular structural elements (12) formed as opaque elements in transparent surroundings on the mask or reticle. At lease one of the structural elements has a grating-like arrangement (16) of sub-structural elements (18) on its long side (17), which are directly adjacent to the structural element. The respective sub-structural elements have the same transparency as that of the structural element. An independent claim is included for a method of determining the ideal focus position of a semiconductor wafer relative to a leans system for a lithographic projection step.

公开(公告)号：DE10227304A1

公开(公告)日：2004-01-15

申请号：DE10227304

申请日：2002-06-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STAECKER JENS ,  HOMMEN HEIKO

IPC: G03F9/00 ,  G03F7/20

Abstract: The semiconductor wafer (1) contains one or more adjusting markings (22) in first layer (14) on wafer, on which is deposited a second layer (12). A used microscope measuring appts. comprises specified components, such as light sources, one with visual wavelengths range for visualising the marking and one for UV wavelength range for exposing first resist film (10). The method includes several steps, such as deposition of resist film on second layer (12), switching the light soruces for exposition of resist film in region (30) above the marking, etching the second layer and deposition of a second resist film, and exposition of second resist film by projection of a mask.

公开(公告)号：DE10342775B4

公开(公告)日：2006-03-23

申请号：DE10342775

申请日：2003-09-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DRUMMER HEIKE ,  STAECKER JENS ,  FROEHLICH HANS-GEORG ,  GRUSS STEFAN ,  WIENHOLD RALPH ,  GRAF WERNER

IPC: H01L23/544 ,  G03F9/00 ,  H01L21/66 ,  H01L21/8242

公开(公告)号：DE10345238A1

公开(公告)日：2005-05-04

申请号：DE10345238

申请日：2003-09-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOMMEN HEIKO ,  STAECKER JENS

IPC: G03F9/00 ,  H01L23/544

Abstract: The adjustment marking has a grid structure (10), for provision of a diffraction grating in the photolithographic structuring apparatus, formed by a number of first structural elements (12) applied to the surface of the semiconductor wafer in parallel with one another, at a defined relative spacing, selected elements interrupted for providing a region (14) without any structural elements. At least one partial structure (16), providing a diffraction grating and a reflection pattern in the photolithographic structuring apparatus, has a number of second structural elements (18), at least some of which extend in line with first structural elements of the grid structure.

公开(公告)号：DE10344850A1

公开(公告)日：2005-04-28

申请号：DE10344850

申请日：2003-09-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STAECKER JENS ,  SCHEDEL THORSTEN ,  HOMMEN HEIKO ,  BRUCH JENS UWE ,  FERNANDEZ-MARTINEZ PIEDAD

IPC: G03F7/20 ,  G03F9/00 ,  H01L21/66 ,  H01L23/544 ,  G01M11/00 ,  G01N21/95

Abstract: The method involves making a wafer (5) available with a substrate, on a conductive layer with a resist arranged. A structural component of a first mask is projected for exposing the resist in a first cutout. The cutout is developed and transferred for forming an electrically leading structure. The first resist is removed and a second resist is applied. The structural component of a second mask is projected for exposing the resist in a second cutout above the electrically leading structure with a misalignment dependent on an aberration in relation to the electrically leading structure. An electrical measurement of the line width is accomplished at the electrically leading structure. The misalignment is calculated from the result of the electrical measurement of the line width for the determination of the situation accuracy. An independent claim is included for an execution of the procedure.

公开(公告)号：DE10342775A1

公开(公告)日：2005-04-28

申请号：DE10342775

申请日：2003-09-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DRUMMER HEIKE ,  STAECKER JENS ,  FROEHLICH HANS-GEORG ,  GRUSS STEFAN ,  WIENHOLD RALPH ,  GRAF WERNER

IPC: G03F9/00 ,  H01L21/66 ,  H01L21/8242 ,  H01L23/544

Abstract: When forming the main structure, at least two further structural components (12b) are formed, spaced apart on the wafer (10) substrate (5) surface. They are alignment marks. A trench (26) is formed to join them. Their (12b) spacing, and the trench depth, exceed the layer (14) thickness. In this way, a depression (27) with sidewalls (28) remains in the planarized surface (32) of the layer (14). During alignment of the wafer, the sidewalls (28) are detected. An independent claim is included for the corresponding mark.

公开(公告)号：DE10248224A1

公开(公告)日：2004-05-13

申请号：DE10248224

申请日：2002-10-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESSIGER MARTIN ,  STAECKER JENS ,  SCHEDEL THORSTEN

IPC: H01L23/544 ,  G03F9/00 ,  G03F7/20

公开(公告)号：DE10345496B4

公开(公告)日：2007-12-20

申请号：DE10345496

申请日：2003-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STAECKER JENS ,  HOMMEN HEIKO

IPC: G03F9/00 ,  H01L23/544

公开(公告)号：DE102004061054A1

公开(公告)日：2006-07-06

申请号：DE102004061054

申请日：2004-12-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRUCH JENS ,  STAECKER JENS ,  HOMMEN HEIKO ,  SCHUMACHER KARL ,  SCHIWON ROBERTO ,  SCHMIDT-LANZ MARTIN ,  EFFERENN DIRK

IPC: H01L21/68 ,  G03F7/00

Abstract: The method involves laying of first side of substrate on substrate holder (10), setting of first fluid pressure at the first sub range (26,28,30) of first side of substrate and setting of second fluid pressure at the second sub range of the first side of the substrate. The setting of first fluid pressure and second fluid pressure are implemented after one another. An independent claim is also included for the substrate holding device.

公开(公告)号：DE10342776A1

公开(公告)日：2005-04-21

申请号：DE10342776

申请日：2003-09-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STAECKER JENS

IPC: G03F9/00 ,  H01L21/66 ,  H01L21/8242 ,  H01L23/544

Abstract: The method has the surface of a semiconductor wafer substrate provided with an array of circuit structures, each having adjustment markings (27) at the edges of an exposure field, at least 2 cover surfaces applied to the upper side of the semiconductor wafer (10) so that at least 2 adjustment markings are covered, before deposition of a metal layer (35) on the substrate surface, with subsequent removal of the cover surfaces for allowing the revealed adjustment markings to be used for determining the required correction of the semiconductor wafer position.