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21 records (took 0.027 seconds)

    12.
    发明专利
    未知

    公开(公告)号：ITVA990020A1

    公开(公告)日：2001-01-16

    申请号：ITVA990020

    申请日：1999-07-16

    Applicant: ST MICROELECTRONICS SRL

    Inventor： DEMICHELI MARCO ,  BOLLATI GIACOMINO ,  DEMICHELI DAVIDE ,  MARCHESE STEFANO

    IPC: G11B20/10

    Abstract: A method is provided for defining programmed values of the boost and cut-off frequency parameters of a low pass filter of pre-equalization, of a read channel for a magnetic medium mass memory device, to ensure optimal functioning conditions of the adaptive filter of final equalization. The method includes pre-programming instantaneous digital values of the boost and cut-off frequency parameters of the low pass filter of pre-equalization for each magnetic medium, as a function of purposely sensed instantaneous operating parameters of the adaptive filter that carries out the definitive equalization of the signal during a trim scanning of the magnetic medium.

    15.
    发明专利
    未知

    公开(公告)号：IT1313390B1

    公开(公告)日：2002-07-23

    申请号：ITVA990020

    申请日：1999-07-16

    Applicant: ST MICROELECTRONICS SRL

    Inventor： DEMICHELI MARCO ,  BOLLATI GIACOMINO ,  DEMICHELI DAVIDE ,  MARCHESE STEFANO

    IPC: G11B20/10

    Abstract: A method is provided for defining programmed values of the boost and cut-off frequency parameters of a low pass filter of pre-equalization, of a read channel for a magnetic medium mass memory device, to ensure optimal functioning conditions of the adaptive filter of final equalization. The method includes pre-programming instantaneous digital values of the boost and cut-off frequency parameters of the low pass filter of pre-equalization for each magnetic medium, as a function of purposely sensed instantaneous operating parameters of the adaptive filter that carries out the definitive equalization of the signal during a trim scanning of the magnetic medium.

    20.
    发明专利
    未知

    公开(公告)号：DE69819919D1

    公开(公告)日：2003-12-24

    申请号：DE69819919

    申请日：1998-12-15

    Applicant: ST MICROELECTRONICS SRL

    Inventor： DEMICHELI MARCO ,  BRUCCOLERI MELCHIORRE ,  MALFA MAURIZIO ,  BOLLATI GIACOMINO

    IPC: G11B5/09 ,  G11B5/012 ,  G11B20/10

    Abstract: A method of delaying by a certain time interval ( DELTA wp) a transition in a digital data stream (O) fed to a write head of a mass storage device when said transition occurs at a clock phase following the one during which a preceding transition has occurred, for pre-compensating intersymbolic nonlinear interference effects suffered when reading the stored data, comprises feeding to a first circuit (CC1) a digital data stream (I) to be stored and a clock signal (Ck) and outputting from said first circuit (CC1) a pair of digital streams (N, R), a first stream (N) assuming a first logic value every time a transition of said input stream occurs during a clock phase not successive to a clock phase during which a transition of said input stream (I) has occurred, the second stream (R) assuming said first logic value every time a transition of said input stream (I) occurs during a clock phase following a clock phase during which a transition has taken place in said input stream (I); feeding said two digital stream (N, R) and said clock signal (Ck) to as many inputs of a second circuit (DC1) and outputting from said second circuit said digital data stream (O) directed to the write head, in which the transitions immediately following a preceding transition are delayed by said pre-established time interval ( DELTA wp), by sampling the two digital streams (N, R) with a pair of flip-flops (FN2, FR2), each of which is respectively timed by clock signals respectively delayed by a certain different time interval ( DELTA n, DELTA r) and such that the difference between said different delay intervals is equal to said pre-established time interval ( DELTA n- DELTA r= DELTA wp) and recombining the signals output from said pair of flip-flops (FN2, FR2) through an logic XOR gate (X1) into said digital data stream (O).

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