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    Process for forming a buried cavity in a semiconductor material wafer
    13.
    发明公开
    Process for forming a buried cavity in a semiconductor material wafer 审中-公开
    Herstellungsverfahren eines vergrabenen Hohlraumes in einer Halbleiterscheibe

    公开(公告)号：EP1130631A1

    公开(公告)日：2001-09-05

    申请号：EP00830148.3

    申请日：2000-02-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Erratico, Pietro ,  Sacchi, Enrico ,  Villa, Flavio ,  Barlocchi, Gabriele ,  Corona, Pietro

    IPC: H01L21/308

    CPC classification number: B81C1/00404

    Abstract: The process comprises the steps of forming, on top of a semiconductor material wafer (10), a holed mask (16) having a lattice structure and comprising a plurality of openings (18) each having a substantially square shape and a side with an inclination of 45° with respect to the flat (110) of the wafer; carrying out an anisotropic etch in TMAH of the wafer (10), using said holed mask (16), thus forming a cavity (20), the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapour deposition (CVD) using TEOS, thus forming a TEOS layer (24) which completely closes the openings of the holed mask (16) and defines a diaphragm (26) overlying the cavity (20) and on which a suspended integrated structure can subsequently be manufactured.

    Abstract translation: 该方法包括以下步骤：在半导体材料晶片（10）的顶部上形成具有格子结构的孔掩模（16），并且包括多个开口（18），每个开口（18）均具有大致正方形的形状， 相对于晶片的平面（110）为45°; 使用所述带孔掩模（16）在晶片（10）的TMAH中进行各向异性蚀刻，从而形成空腔（20），其横截面具有倒立的等腰梯形的形状; 并使用TEOS进行化学气相沉积（CVD），由此形成TEOS层（24），该TEOS层完全封闭了孔罩（16）的开口，并且限定了覆盖空腔（20）的隔膜（26） 随后可以制造悬浮综合结构。

    Process for manufacturing a SOI wafer with buried oxide regions without cusps
    14.
    发明公开
    Process for manufacturing a SOI wafer with buried oxide regions without cusps 审中-公开
    一种制造SOI晶片的方法与隐埋氧化物区域没有峰

    公开(公告)号：EP1049155A1

    公开(公告)日：2000-11-02

    申请号：EP99830256.6

    申请日：1999-04-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Villa, Flavio ,  Barlocchi, Gabriele ,  Corona, Pietro

    IPC: H01L21/762 ,  H01L21/32

    CPC classification number: H01L21/02238 ,  H01L21/02299 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76208 ,  H01L21/76248

    Abstract: The process comprises the steps of forming, in a wafer (1) of monocrystalline semiconductor material, trenches (45) extending between, and delimiting laterally, protruding regions (48); forming masking regions (55, 56), implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions (48); and forming retarding regions (57) on the bottom of the trenches (45), wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions (48) and then proceeds downwards; thereby, a continuous region (65) of buried oxide is formed and is overlaid by non-oxidized regions (60) corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions (55, 56) and the retarding regions (57) are formed through two sucdessive implants, including an angle implant, wherein the protruding regions (48) shield the bottom portions of the adjacent protruding regions (48), as well as the bottom of the trenches (45), and a is made perpendicularly to the wafer (1).

    Abstract translation: 该方法包括形成的步骤中，在单晶半导体材料，沟槽（45）之间延伸，并且限定尾盘反弹，突出区域（48）的晶片（1）; 上方形成掩蔽区域（55，56）中，用氮离子注入，完全包围掩模区调用突出区域的尖端（48）; 以及在所述沟槽的底部区域阻滞（57）（45）worin氮在低于掩蔽区域低剂量植入。 然后，热氧化被执行并且在突出区域（48）的底部部分开始，然后前进向下; 由此，掩埋氧化物的连续区域（65）形成，并且是由非氧化区域（60）对应于所述突出区域的尖端和用于随后的外延生长形成核的区域覆盖。 掩蔽区域（55，56）和所述延迟区（57）通过两个sucdessive植入物形成，包括在角植入物，worin突出区域（48）屏蔽所述相邻突出区域的底部部分（48），以及 所述沟槽的底部（45），和一个垂直于由所述晶片（1）。

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