METHOD FOR MANUFACTURING A GATE TERMINAL OF A HEMT DEVICE, AND HEMT DEVICE

    公开(公告)号:EP3817032A1

    公开(公告)日:2021-05-05

    申请号:EP20202878.3

    申请日:2020-10-20

    Abstract: Method for manufacturing a HEMT device (1) including the steps of: forming, on a heterostructure (3), a single dielectric layer (7); forming a through opening (9) through the dielectric layer; and forming a gate electrode (8) at the through opening. Forming the gate electrode includes: forming a sacrificial structure (34); depositing by evaporation a Ni layer (20); carrying out a lift-off of the sacrificial structure; depositing a WN layer (22) by sputtering; and depositing an Al layer (24). The WN layer forms a barrier against the diffusion of Al atoms towards the heterostructure.

    DOUBLE-CHANNEL HEMT DEVICE AND MANUFACTURING METHOD THEREOF
    14.
    发明公开
    DOUBLE-CHANNEL HEMT DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
    双通道HEMT装置及其制造方法

    公开(公告)号:EP3252825A1

    公开(公告)日:2017-12-06

    申请号:EP16425047.4

    申请日:2016-05-30

    Abstract: An HEMT device (1), comprising: a semiconductor body (15) including a heterojunction structure (13); a dielectric layer (7) on the semiconductor body; a gate electrode (8); a drain electrode (12), facing a first side (8') of the gate electrode (8); and a source electrode (10), facing a second side (8") opposite to the first side (8') of the gate electrode; an auxiliary channel layer (20), which extends over the heterojunction structure (13) between the gate electrode (8) and the drain electrode (12), in electrical contact with the drain electrode (12) and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

    Abstract translation: 一种HEMT器件(1),包括:包括异质结结构(13)的半导体主体(15); 在半导体主体上的介电层(7) 一个栅电极(8); 漏电极(12),面对栅电极(8)的第一侧(8'); 和面向与所述栅电极的所述第一侧(8')相对的第二侧(8“)的源电极(10);辅助沟道层(20),其在所述异质结结构(13) 电极(8)和漏电极(12),与漏电极(12)电接触并与栅电极隔开一定距离,并形成用于在源电极和漏电极之间流动的电荷载流子的附加导电路径 。

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