公开(公告)号：EP3804142A1

公开(公告)日：2021-04-14

申请号：EP19730638.4

申请日：2019-05-24

Applicant: Xilinx, Inc.

Inventor： MEGAWER, Karim M. ,  UPADHYAYA, Parag ,  TURKER MELEK, Didem Z. ,  WU, Zhaoyin D.

IPC: H03M3/00 ,  H03M7/36 ,  H03L7/197

公开(公告)号：EP3440774B1

公开(公告)日：2020-02-12

申请号：EP17718759.8

申请日：2017-04-06

Applicant: Xilinx, Inc.

Inventor： NANDWANA, Romesh K. ,  UPADHYAYA, Parag

IPC: H03L7/08 ,  H03L7/099

公开(公告)号：EP3039787B1

公开(公告)日：2017-08-02

申请号：EP14726257.0

申请日：2014-04-09

Applicant: Xilinx, Inc.

Inventor： SEWANI, Aman ,  UPADHYAYA, Parag

IPC: H03K19/0185 ,  H03K19/177

CPC classification number: H03K19/018521 ,  H03K19/17744 ,  H03K19/1778 ,  H03K19/17788

公开(公告)号：EP3039787A1

公开(公告)日：2016-07-06

申请号：EP14726257.0

申请日：2014-04-09

Applicant: Xilinx, Inc.

Inventor： SEWANI, Aman ,  UPADHYAYA, Parag

IPC: H03K19/177

CPC classification number: H03K19/018521 ,  H03K19/17744 ,  H03K19/1778 ,  H03K19/17788

Abstract: An input/output circuit (102) implemented in an integrated circuit (100) is described. The input/output circuit comprises an input/output pad (202, 204) and a voltage control circuit (229) coupled to the input/output pad. The voltage control circuit sets a voltage at the input/output pad at a first voltage when the input/output pad is implemented as an input pad (RX Mode control: high) and at a second voltage when the input/output pad is implemented as an output pad (RX Mode Control: low). Methods of implementing input/output circuits in an integrated circuit are also described.

Abstract translation: 上的集成电路实现的在输入/输出电路进行说明。 输入/输出焊盘和耦合到所述输入/输出焊盘上的电压控制电路的输入/输出电路包括。 电压控制电路以第一电压时，输入/输出焊盘被实现为到输入焊盘和在当所述输入/输出焊盘被实现为到输出焊盘上的第二电压设置在所述输入/输出焊盘上的电压。 因此描述了一个集成电路实现输入/输出电路的方法。

公开(公告)号：EP3420635B1

公开(公告)日：2020-02-05

申请号：EP16816831.8

申请日：2016-12-06

Applicant: Xilinx, Inc.

Inventor： TURKER MELEK, Didem Z. ,  UPADHYAYA, Parag ,  CHANG, Kun-Yung

IPC: H03G1/00 ,  H03G3/00 ,  H03F1/02 ,  H03F3/45 ,  H04L25/03 ,  H03G3/30

公开(公告)号：EP3580849A1

公开(公告)日：2019-12-18

申请号：EP18708316.7

申请日：2018-02-21

Applicant: Xilinx, Inc.

Inventor： CHO, Junho ,  POON, Chi, Fung ,  UPADHYAYA, Parag

IPC: H03M1/46 ,  H03M1/40

公开(公告)号：EP3289687B1

公开(公告)日：2019-12-18

申请号：EP16723574.6

申请日：2016-04-26

Applicant: Xilinx, Inc.

Inventor： UPADHYAYA, Parag ,  BEKELE, Adebabay, M. ,  TURKER MELEK, Didem, Z. ,  WU, Zhaoyin, D.

IPC: H03L7/18 ,  H03L7/197

公开(公告)号：EP3408938B1

公开(公告)日：2019-07-03

申请号：EP16816469.7

申请日：2016-11-16

Applicant: Xilinx, Inc.

Inventor： HEARNE, Catherine ,  UPADHYAYA, Parag ,  GEARY, Kevin

IPC: H03K5/135 ,  H03K5/00

公开(公告)号：EP3465916A1

公开(公告)日：2019-04-10

申请号：EP17726468.6

申请日：2017-05-19

Applicant: Xilinx, Inc.

Inventor： RAJ, Mayank ,  UPADHYAYA, Parag ,  BEKELE, Adebabay M.

IPC: H03L7/089 ,  H03L7/091

公开(公告)号：EP3420635A1

公开(公告)日：2019-01-02

申请号：EP16816831.8

申请日：2016-12-06

Applicant: Xilinx, Inc.

Inventor： TURKER MELEK, Didem Z. ,  UPADHYAYA, Parag ,  CHANG, Kun-Yung

IPC: H03G1/00 ,  H03G3/30 ,  H04L25/03

CPC classification number: H03G3/3036 ,  H03F1/0205 ,  H03F1/0211 ,  H03F3/16 ,  H03F3/45197 ,  H03F2200/555 ,  H03F2203/45492 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H04B1/123 ,  H04L25/03885

Abstract: An example automatic gain control (AGC) circuit includes a base current-gain circuit having a programmable source degeneration resistance responsive to first bits of an AGC code word. The AGC circuit further includes a programmable current-gain circuit, coupled between an input and an output of the base current-gain circuit, having a programmable current source responsive to second bits of the AGC code word. The AGC circuit further includes a bleeder circuit, coupled to the output of the base current-gain circuit, having a programmable current source responsive to logical complements of the second bits of the AGC code word. The AGC circuit further includes a load circuit coupled to the output of the base current-gain circuit.