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    Lateral connection for a via-less thin film resistor and method of forming the same
    13.
    发明公开
    Lateral connection for a via-less thin film resistor and method of forming the same 审中-公开
    用于薄膜电阻横向连接，而通孔及其制造方法

    公开(公告)号：EP2423948A2

    公开(公告)日：2012-02-29

    申请号：EP11178590.3

    申请日：2011-08-24

    Applicant: STMicroelectronics Pte Ltd.

    Inventor： Ng, Hui Chong Vince ,  Le Neel, Olivier ,  Leung, Calvin

    IPC: H01L21/02 ,  H01L23/522 ,  H01L23/64

    CPC classification number: H01L23/5228 ,  H01L21/76834 ,  H01L21/76852 ,  H01L28/20 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present disclosure is directed to an integrated circuit (100) having a substrate (108) and a first and a second interconnect structure (104a,b) over the substrate. Each interconnect structure has a first conductive layer (106) over the substrate and a second conductive layer (124) over the first conductive layer. The integrated circuit also includes a thin film resistor (102) over a portion of the substrate between the first and the second interconnect structure that electrically connects the first conductive layers of the first and second interconnect structures.

    Abstract translation: 本发明涉及在具有基板（108）和第一和第二互连结构（104A，b）在基板的集成电路（100）。 每一个互连结构具有超过基板和在所述第一导电层的第二导电层（124）的第一导电层（106）。 因此，该集成电路包括一个薄膜电阻器（102）在第一和没有导电连接第一和第二互连结构的第一层的第二互连结构之间的衬底的一部分。

    Méthode de fixage d'une lentille par rapport à un capteur optique dans un dispositif de prise d'images
    15.
    发明公开
    Méthode de fixage d'une lentille par rapport à un capteur optique dans un dispositif de prise d'images 审中-公开
    Methode zur Befestigung einer Linsegegenübereinem optischen传感器在einer Bildaufnahmevorrichtung

    公开(公告)号：EP1498756A1

    公开(公告)日：2005-01-19

    申请号：EP03291781.7

    申请日：2003-07-17

    Applicant: STMicroelectronics S.A. ,  STMicroelectronics S.r.l. ,  STMicroelectronics Pte Ltd.

    Inventor： Magni, Pierangelo ,  Brechignac, Remi ,  Kho, Chek Lim ,  Loo, Kum Weng

    IPC: G02B7/02 ,  H04N5/225

    CPC classification number: G02B13/001 ,  G02B7/02 ,  G02B27/62 ,  H01L2224/48227 ,  H04N5/2254

    Abstract: On décrit une méthode pour fixer une lentille (8) d'un groupe (11) optique par rapport à un capteur optique (4) dans un dispositif de prise d'images comprenant les phases de:

    loger le capteur optique (1) dans un boîtier (2),
    fixer un support (12) inférieur du groupe (11) optique au boîtier (1);
    aligner un support (13) supérieur du groupe (11) optique, où la lentille (8) est logée, au capteur optique (1) de façon à aligner un point de focalisation de la lentille (8) par rapport au capteur optique (1),
    souder le support (13) supérieur au support (12) inférieur.

    Avantageusement selon l'invention, la méthode prévoit que la phase de soudure est effectuée par ultrasons.

    Abstract translation: 该方法包括将光学传感器（1）容纳在壳体（2）中，并将光学单元（11）的下部支撑件（12）固定到壳体上。 光学单元具有上部支撑件，其中容纳透镜（8），与传感器对准，以使透镜的焦点相对于传感器（1）对准。 光学单元的上支撑件通过能量束与下支撑件焊接。 成像设备包括独立权利要求。

    MULTI-PRECISION TECHNIQUE FOR DIGITAL AUDIO ENCODER
    16.
    发明公开
    MULTI-PRECISION TECHNIQUE FOR DIGITAL AUDIO ENCODER 有权
    与不同精度的数字音频编码器

    公开(公告)号：EP1125235A1

    公开(公告)日：2001-08-22

    申请号：EP98951905.3

    申请日：1998-10-26

    Applicant: STMicroelectronics Pte Ltd.

    Inventor： ABSAR, Mohammed, Javed ,  GEORGE, Sapna ,  ALVAREZ-TINOCO, Antonio, Mario

    IPC: G06F19/00

    CPC classification number: G10L19/0212 ,  G10L19/16

    Abstract: AC-3 is a high quality audio compression format widely used in feature films and, more recently, on Digital Versatile Disks (DVD). For consumer applications the algorithm is usually coded into the firmware of a DSP Processor, which due to cost considerations may be capable of only fixed point arithmetic. It is generally assumed that 16-bit processing is incapable of delivering the high fidelity audio, expected from the AC-3 technology. Double precision computation can be utilized on such processors to provide the high quality; but the computational burden of such implementation will be beyond the capacity of the processor to enable real-time operation. Through extensive simulation study of a high quality AC-3 encoder implementation, a multi-precision technique for each processing block is presented whereby the quality of the encoder on a 16-bit processor matches the single precision 24-bit implementation very closely without excessive additional computational complexity.

    PANEL LEVEL SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    17.
    发明公开
    PANEL LEVEL SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-实审

    公开(公告)号：EP4362071A2

    公开(公告)日：2024-05-01

    申请号：EP23206096.2

    申请日：2023-10-26

    Applicant: STMicroelectronics Pte Ltd.

    Inventor： GANI, David

    IPC: H01L21/60 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31

    CPC classification number: H01L24/19 ,  H01L24/96 ,  H01L23/5389 ,  H01L23/3128 ,  H01L21/561 ,  H01L21/568

    Abstract: The present disclosure is directed to at least one semiconductor package including a die (204) within an encapsulant (202) having a first sidewall, an adhesive layer (222) on the encapsulant and having a second sidewall coplanar with the first sidewall of the encapsulant, and an insulating layer (226) on the adhesive layer having a third sidewall coplanar with the first sidewall and the second sidewall. A method of manufacturing the at least one semiconductor package includes forming an insulating layer on a temporary adhesion layer of a carrier, forming an adhesive layer on the insulating layer, and forming a plurality of openings through the adhesive layer and the insulating layer. The plurality of openings through the adhesive layer and the insulating layer may be formed by exposing the adhesive layer and the insulating layer to a laser.

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