公开(公告)号：US09006845B2

公开(公告)日：2015-04-14

申请号：US13743300

申请日：2013-01-16

Applicant: Infineon Technologies AG

Inventor： Alfons Dehe

IPC: H01L29/84 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81C1/00325 ,  B81B3/0072 ,  B81B2201/0257 ,  B81C1/00158 ,  B81C1/00182 ,  B81C2201/013 ,  B81C2201/0159 ,  B81C2201/0198

Abstract: A MEMS device, a method of making a MEMS device and a system of a MEMS device are shown. In one embodiment, a MEMS device includes a first polymer layer, a MEMS substrate disposed on the first polymer layer and a MEMS structure supported by the MEMS substrate. The MEMS device further includes a first opening disposed in the MEMS substrate and a second opening disposed in the first polymer layer.

Abstract translation: 示出了MEMS器件，制造MEMS器件的方法和MEMS器件的系统。 在一个实施例中，MEMS器件包括第一聚合物层，设置在第一聚合物层上的MEMS衬底和由MEMS衬底支撑的MEMS结构。 MEMS器件还包括设置在MEMS衬底中的第一开口和设置在第一聚合物层中的第二开口。

公开(公告)号：US08865497B2

公开(公告)日：2014-10-21

申请号：US12973422

申请日：2010-12-20

Applicant: George A. Dunbar, III ,  Zhong-Xiang He ,  Jeffrey C. Maling ,  William J. Murphy ,  Anthony K. Stamper

Inventor： George A. Dunbar, III ,  Zhong-Xiang He ,  Jeffrey C. Maling ,  William J. Murphy ,  Anthony K. Stamper

IPC: H01L29/84 ,  B81C1/00 ,  B81B3/00 ,  G06F17/50 ,  H01H57/00

CPC classification number: B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires from the lower wiring layer. The method further includes forming an electrode beam over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition.

Abstract translation: 形成至少一个微机电系统（MEMS）的方法包括在基板上形成下布线层。 该方法还包括从下布线层形成多条分立布线。 该方法还包括在多个离散导线上形成电极束。 形成电极束和多个离散导线中的至少一个形成有最小化后续硅沉积中的小丘和三点的布局。

公开(公告)号：US20140239979A1

公开(公告)日：2014-08-28

申请号：US13779160

申请日：2013-02-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： IRA OAKTREE WYGANT ,  PETER B. JOHNSON

IPC: G01R27/26

CPC classification number: G01P15/125 ,  B81B7/007 ,  B81B2201/0271 ,  B81B2203/0127 ,  B81B2207/096 ,  B81C1/00301 ,  B81C2201/013 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/036 ,  H02N1/006 ,  H03H3/0072 ,  H03H9/1057 ,  H03H9/2468 ,  H03H9/2489 ,  H04R19/005 ,  Y10T29/49165

Abstract: A packaged capacitive MEMS sensor device includes at least one capacitive MEMS sensor element with at least one capacitive MEMS sensor cell including a first substrate having a thick and a thin dielectric region. A second substrate with a membrane layer is bonded to the thick dielectric region and over the thin dielectric region to provide a MEMS cavity. The membrane layer provides a fixed electrode and a released MEMS electrode over the MEMS cavity. A first through-substrate via (TSV) extends through a top side of the MEMS electrode and a second TSV through a top side of the fixed electrode. A metal cap is on top of the first TSV and second TSV. A third substrate including an inner cavity and outer protruding portions framing the inner cavity is bonded to the thick dielectric regions. The third substrate together with the first substrate seals the MEMS electrode.

Abstract translation: 封装的电容MEMS传感器装置包括至少一个电容式MEMS传感器元件，其具有至少一个电容式MEMS传感器单元，该电容式MEMS传感器单元包括具有厚和薄电介质区域的第一基板 具有膜层的第二衬底被结合到厚电介质区域和薄介电区域上以提供MEMS空腔。 膜层在MEMS腔体上提供固定电极和释放的MEMS电极。 第一穿通基板通孔（TSV）延伸穿过MEMS电极的顶侧，通过固定电极的顶侧延伸穿过第二TSV。 金属帽位于第一TSV和第二TSV的顶部。 包括内腔和构成内腔的外突出部分的第三基板被接合到厚电介质区域。 第三衬底与第一衬底一起密封MEMS电极。

公开(公告)号：US20140217478A1

公开(公告)日：2014-08-07

申请号：US14172383

申请日：2014-02-04

Applicant: Butterfly Network, Inc.

Inventor： Jonathan M. Rothberg ,  Kieth G. Fife ,  Tyler S. Ralston ,  Gregory L. Charvat ,  Nevada J. Sanchez

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B06B1/0292 ,  B06B1/02 ,  B81B3/0021 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C1/00158 ,  B81C2201/013 ,  B81C2203/0118 ,  B81C2203/0735 ,  B81C2203/0771 ,  G10K9/12 ,  G10K11/18

Abstract: CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

公开(公告)号：US20120223053A1

公开(公告)日：2012-09-06

申请号：US13469697

申请日：2012-05-11

Applicant: Dan B. Millward ,  Timothy Quick

Inventor： Dan B. Millward ,  Timothy Quick

IPC: B44C1/22 ,  C08L75/04 ,  C08L83/04 ,  C08F212/08 ,  C08G65/34

CPC classification number: H01L21/76828 ,  B81C1/00031 ,  B81C2201/013 ,  B81C2201/0149 ,  B81C2201/0198 ,  B82Y30/00 ,  C08F299/02 ,  C08F299/0492 ,  G03F7/0002 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31133 ,  H01L21/76802 ,  H01L21/76877

Abstract: Methods for fabricating sublithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.

Abstract translation: 提供了利用自组装嵌段共聚物制造亚光刻，纳米级微结构的方法，以及由这些方法形成的膜和器件。

公开(公告)号：US20110318861A1

公开(公告)日：2011-12-29

申请号：US12973285

申请日：2010-12-20

Applicant: Christopher V. JAHNES ,  Anthony K. STAMPER

Inventor： Christopher V. JAHNES ,  Anthony K. STAMPER

IPC: H01L21/02 ,  G06F17/50

CPC classification number: B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) cavity includes forming a first sacrificial cavity layer over a lower wiring layer. The method further includes forming a layer. The method further includes forming a second sacrificial cavity layer over the first sacrificial layer and in contact with the layer. The method further includes forming a lid on the second sacrificial cavity layer. The method further includes forming at least one vent hole in the lid, exposing a portion of the second sacrificial cavity layer. The method further includes venting or stripping the second sacrificial cavity layer such that a top surface of the second sacrificial cavity layer is no longer touching a bottom surface of the lid, before venting or stripping the first sacrificial cavity layer thereby forming a first cavity and second cavity, respectively.

Abstract translation: 形成至少一个微机电系统（MEMS）腔的方法包括在下布线层上形成第一牺牲腔层。 该方法还包括形成层。 该方法还包括在第一牺牲层上形成与层接触的第二牺牲腔层。 该方法还包括在第二牺牲腔层上形成盖子。 该方法还包括在盖中形成至少一个通气孔，暴露第二牺牲腔层的一部分。 该方法还包括排气或剥离第二牺牲腔层，使得第二牺牲腔层的顶表面在不排除或剥离第一牺牲腔层之前不再接触盖的底表面，从而形成第一腔和第二腔 腔。

公开(公告)号：US20110316098A1

公开(公告)日：2011-12-29

申请号：US12973333

申请日：2010-12-20

Applicant: George A. DUNBAR, III ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

Inventor： George A. DUNBAR, III ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower sacrificial material used to form a lower cavity. The method further includes forming a cavity via connecting the lower cavity to an upper cavity. The cavity via is formed with a top view profile of rounded or chamfered edges. The method further includes forming an upper sacrificial material within and above the cavity via, which has a resultant surface based on the profile of the cavity via. The upper cavity is formed with a lid that is devoid of structures that would interfere with a MEMS beam, including: depositing a lid material on the resultant surface of the upper sacrificial material; and venting the upper sacrificial material to form the upper cavity such the lid material forms the lid which conforms with the resultant surface of the upper sacrificial material.

Abstract translation: 形成至少一个微机电系统（MEMS）的方法包括形成用于形成下腔的较低牺牲材料。 该方法还包括通过将下腔体连接到上部空腔来形成空腔。 空腔通孔形成有圆形或倒角边缘的顶视图。 该方法还包括在空腔内部和上方形成上部牺牲材料，其具有基于空腔通路的轮廓的合成表面。 上空腔形成有没有会干扰MEMS梁的结构的盖，包括：在上牺牲材料的所得表面上沉积盖材料; 并且排出上部牺牲材料以形成上部空腔，使得盖子材料形成与上部牺牲材料的合成表面一致的盖子。

公开(公告)号：US20240359970A1

公开(公告)日：2024-10-31

申请号：US18627888

申请日：2024-04-05

Applicant: Hisanori AGA

Inventor： Hisanori AGA

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0078 ,  B81C1/00158 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/04 ,  B81C2201/013

Abstract: A vibration device includes a substrate, a first drive source, a second drive source, and a membrane. The membrane includes a main portion extending in an in-plane direction, and a damper protruding in a direction perpendicular to a plane of the membrane. The main portion includes a first region disposed on the first drive source, a second region disposed on the second drive source, and a third region disposed between the first region and the second region. The damper includes a first portion connecting the first region and the third region, and a second portion connecting the second region and the third region.

公开(公告)号：US20240294372A1

公开(公告)日：2024-09-05

申请号：US18647923

申请日：2024-04-26

Applicant: Stathera IP Holdings Inc.

Inventor： Anosh Daruwalla ,  Reuble Mathew

IPC: B81B3/00 ,  B81C1/00 ,  H03H9/02

CPC classification number: B81B3/0081 ,  B81C1/0069 ,  H03H9/02448 ,  B81B2201/0271 ,  B81B2203/0307 ,  B81B2203/033 ,  B81B2203/04 ,  B81C2201/013 ,  H03H2009/02251

Abstract: A MEMS resonator device includes: (i) a support structure, (ii) a resonator element doped with at least one of N-type or P-type dopants, wherein a doping concentration of the at least one of N-type or P-type dopants causes a closely temperature-compensated mode in which (a) an absolute value of a first order temperature coefficient of frequency of the resonator element is reduced to a first value below a threshold value and (b) an absolute value of a second order temperature coefficient of frequency of the resonator element is reduced to about zero, and wherein an anchor decoupler region formed on the resonator element causes the absolute value to be further reduced to a second value, and (iii) at least one anchor coupling the resonator element to the support structure, wherein the anchor decoupler region is formed on the resonator element at least partially surrounding the at least one anchor.

公开(公告)号：US20240253974A1

公开(公告)日：2024-08-01

申请号：US18102070

申请日：2023-01-26

Applicant: Rosemount Aerospace Inc.

Inventor： Roger Backman ,  Sarah Frink ,  David P. Potasek

IPC: B81B3/00 ,  B81C3/00

CPC classification number: B81B3/0021 ,  B81C3/001 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81C2201/013

Abstract: A wafer die assembly includes a first wafer having at least a central cavity defined therein. The wafer die assembly includes a second wafer mounted to the first wafer. At least one of the first or second wafers includes an etched pattern. The etched pattern including at least one peripheral cavity, and a raised area raised relative to the peripheral cavity. A method of assembling a wafer die assembly includes etching a central cavity into a first wafer and etching a pattern into at least one of the first wafer or a second wafer. The first wafer and/or the second wafer includes a raised area raised relative to the peripheral cavity or the central cavity. The method includes bonding the second wafer to the first wafer.