公开(公告)号：SG11201701609VA

公开(公告)日：2017-03-30

申请号：SG11201701609V

申请日：2015-10-30

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  GSCHWIND MICHAEL KARL

IPC: G06F9/30 ,  G06F9/38

Abstract: Embodiments relate to accessing data in a memory. A method for accessing data in a memory coupled to a processor is provided. The method receives a memory reference instruction for accessing data of a first size at an address in the memory. The method determines an alignment size of the address in the memory. The method accesses the data of the first size in one or more groups of data by accessing each group of data block concurrently. The groups of data have sizes that are multiples of the alignment size.

公开(公告)号：MX343372B

公开(公告)日：2016-11-01

申请号：MX2014010946

申请日：2012-11-15

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  JACOBI CHRISTIAN

IPC: G06F12/10 ,  G06F9/30 ,  G06F9/38

Abstract: Se provee una instrucción de carga a frontera de bloque que carga un número variable de bytes de datos a un registro mientras que asegura que no se cruce una frontera de memoria especificada. La frontera puede ser especificada de una diversidad de maneras, incluyendo pero no limitado a un valor variable en el texto de instrucción, un valor de texto de instrucción fijo codificada en el código de operación o una frontera a base de registro.

公开(公告)号：SG11201606091UA

公开(公告)日：2016-08-30

申请号：SG11201606091U

申请日：2015-03-19

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN

IPC: G06F9/50 ,  G06F9/38

Abstract: Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer-implemented method for dynamic enablement of multithreading in a configuration is provided. The configuration includes a core configurable between a single thread (ST) mode and a multithreading (MT) mode, where the ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. The method includes executing in the primary thread in the ST mode, an MT mode setting instruction. A number of threads requested is obtained from a location specified by the MT mode setting instruction. Based on determining that the number of threads requested indicates multiple threads, the MT mode is enabled to execute the multiple threads including the primary thread and the one or more secondary threads.

公开(公告)号：AU2015228889A1

公开(公告)日：2016-08-04

申请号：AU2015228889

申请日：2015-03-11

Applicant: IBM

Inventor： SCHWARZ ERIC MARK ,  BUSABA FADI YUSUF ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SALAPURA VALENTINA ,  JACOBI CHRISTIAN ,  CAIN III HAROLD WADE

IPC: G06F12/08 ,  G06F9/38 ,  G06F9/46

Abstract: Embodiments relate to implementing a coherence protocol. An aspect includes sending a request for data to a remote processor and receiving by a processor a response from the remote processor. The response has a transaction status of a remote transaction on the remote processor. The processor adds the transaction status of the remote transaction on the remote processor in a local transaction interference tracking table.

公开(公告)号：AU2012382776B2

公开(公告)日：2016-08-04

申请号：AU2012382776

申请日：2012-11-22

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY

IPC: G06F9/46

Abstract: A NONTRANSACTIONAL STORE instruction, executed in transactional execution mode, performs stores that are retained, even if a transaction associated with the instruction aborts. The stores include user-specified information that may facilitate debugging of an aborted transaction.

公开(公告)号：AU2012382777B2

公开(公告)日：2016-06-23

申请号：AU2012382777

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F9/06 ,  G06F9/44 ,  G06F9/45 ,  G06F9/54

Abstract: Program exception conditions cause a transaction to abort and typically result in an interruption in which the operating system obtains control. A program interruption filtering control is provided to selectively present the interrupt. That is, the interrupt from the program exception condition may or may not be presented depending at least on the program interruption filtering control and a transaction class associated with the program exception condition. The program interruption filtering control is provided by a TRANSACTION BEGIN instruction.

公开(公告)号：CA2961690A1

公开(公告)日：2016-04-14

申请号：CA2961690

申请日：2015-09-14

Applicant: IBM

Inventor： FARRELL MARK ,  HELLER LISA ,  KUBALA JEFFREY PAUL ,  SCHMIDT DONALD WILLIAM ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  OSISEK DAMIAN ,  BRADBURY JONATHAN DAVID ,  LEHNERT FRANK ,  NERZ BERND ,  JACOBI CHRISTIAN ,  GAINEY CHARLES

IPC: G06F9/48

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

公开(公告)号：SI2724228T1

公开(公告)日：2015-10-30

申请号：SI201330053

申请日：2013-05-17

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F9/00

公开(公告)号：MX2014015356A

公开(公告)日：2015-07-06

申请号：MX2014015356

申请日：2013-05-17

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL ,  JACOBI CHRISTIAN

IPC: G06F9/30 ,  G06F9/38

Abstract: Una institución de ABORTO DE LA TRANSACCIÓN se utiliza para abortar una transacción que se ejecuta en un entorno de computación. La institución de ABORTO DE LA TRANSACCIÓN incluye al menos un campo utilizado para especificar un código de aborto definido por el usuario que indica la razón para abortar la transacción. Basándose en la ejecución de la instrucción de ABORTO DE LA TRANSACCIÓN, se proporciona un código de la condición que indica si la reejecución de la transacción es recomendada.

公开(公告)号：MX2014015353A

公开(公告)日：2015-07-06

申请号：MX2014015353

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  RELSON PETER JEREMY ,  PHILLEY RANDALL WILLIAM

IPC: G06F12/00

Abstract: Se proporciona una operación para señalar a un procesador que se debe utilizar una acción para facilitar la ejecución de una transacción que se ha abordado una o más veces. La operación se especifica dentro de una instrucción o es en sí misma una instrucción. La instrucción se ejecuta basándose en detectar un aborto de las transacciones, e incluye un campo que indica cuántas veces la transacción se ha abortado. El procesador utiliza esta información para determinar qué acción se debe realizar.