公开(公告)号：WO00003572A1

公开(公告)日：2000-01-20

申请号：PCT/JP1999/003664

申请日：1999-07-07

IPC: H01L21/48 ,  H01L23/12 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/02 ,  H05K3/06 ,  H05K3/24 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/0265 ,  H01L21/486 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0035 ,  H05K3/027 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09736 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/0554 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A printed wiring board and method for producing the same, in which an upper-surface pattern is readily formed, and a lower-surface metal foil is hardly damaged when a blind via hole is made by a laser beam. A lower-surface metal foil (220) is provided over the lower surface of an insulating sheet (5), and an upper-surface metal foil (210) thinner than the lower-surface metal foil (220) is provided over its upper surface. An open hole (213) is made in the upper-surface metal foil in a position corresponding to the area (35) where a blind via hole is formed. A laser beam (8) is projected onto the area (35) through the open hole (213) to make a blind via hole (3) the bottom of which is the lower-surface metal foil. A metal plating film (23) is formed on the inner wall of the blind via hole (3). Upper- and lower-surface patterns (21, 22) are formed by etching.

Abstract translation: 一种印刷电路板及其制造方法，其中易于形成上表面图案，并且当通过激光束形成盲通孔时，下表面金属箔几乎不被损坏。 在绝缘片（5）的下表面上设置有下表面金属箔（220），并且在其上表面上设置有比下表面金属箔（220）薄的上表面金属箔（210） 。 在上表面金属箔中形成有与形成盲通孔的区域（35）相对应的位置的开放孔（213）。 激光束（8）通过开孔（213）突出到区域（35）上，以形成其底部为下表面金属箔的盲通孔（3）。 在盲孔（3）的内壁上形成金属镀膜（23）。 上表面和下表面图案（21,22）通过蚀刻形成。

公开(公告)号：WO9820523A3

公开(公告)日：1998-06-25

申请号：PCT/US9719644

申请日：1997-10-30

Applicant: GORE & ASS

Inventor： HASLOW RANDY E ,  HUTCHINS DONALD G ,  LEAF MICHAEL R

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34 ,  H05K3/42 ,  H01L21/00 ,  H05K3/00

CPC classification number: H05K1/0265 ,  H05K3/064 ,  H05K3/108 ,  H05K3/242 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/427 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0158 ,  H05K2201/0352 ,  H05K2201/09736 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/1572 ,  Y10S205/927

Abstract: The present invention relates to a process for metallizing features of an electronic component, where the metallized features, conductive pads, conductive traces, are coated and encapsulated with at least one metal layer and the features on the front side and the back side of the component have different thicknesses. The process comprises the steps of: a) providing an organic based substrate having a conductive metal layer on a front and back side thereof; b) protecting the back side of the substrate, metallizing the front side wherein said metallizing is conducted by electroplating while electrically bussing the front side with the back side; and c) unprotecting the back side and protecting the front side and metallizing the back side by at least one of electroless plating or immersion plating.

公开(公告)号：WO1998020523A2

公开(公告)日：1998-05-14

申请号：PCT/US1997019644

申请日：1997-10-30

Applicant: W.L. GORE & ASSOCIATES, INC.

Inventor： W.L. GORE & ASSOCIATES, INC. ,  HASLOW, Randy, E. ,  HUTCHINS, Donald, G. ,  LEAF, Michael, R.

IPC: H01L21/00

CPC classification number: H05K1/0265 ,  H05K3/064 ,  H05K3/108 ,  H05K3/242 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/427 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0158 ,  H05K2201/0352 ,  H05K2201/09736 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/1572 ,  Y10S205/927

Abstract: The present invention relates to a process for metallizing features of an electronic component, where the metallized features, conductive pads, conductive traces, are coated and encapsulated with at least one metal layer and the features on the front side and the back side of the component have different thicknesses.

Abstract translation: 本发明涉及一种用于金属化电子元件的特征的方法，其中金属化特征，导电焊盘，导电迹线被涂覆并用至少一个金属层封装，并且元件的前侧和后侧上的特征 具有不同的厚度。

公开(公告)号：WO1995019692A1

公开(公告)日：1995-07-20

申请号：PCT/US1995000397

申请日：1995-01-11

Applicant: WATKINS-JOHNSON COMPANY

Inventor： WATKINS-JOHNSON COMPANY ,  ROGERS, Michael, R. ,  WASHBURN, Theodore, E. ,  NOVICE, Michael, A. ,  BESSER, Ronald, S. ,  WHITE, Brian, S.

IPC: H05K03/42

CPC classification number: H05K3/426 ,  H01L21/486 ,  H05K1/0306 ,  H05K3/0017 ,  H05K3/108 ,  H05K3/388 ,  H05K3/4038 ,  H05K2201/09563 ,  H05K2201/09736 ,  H05K2203/025 ,  H05K2203/107 ,  H05K2203/1105 ,  H05K2203/128

Abstract: A method of forming solid metal vias (12) extending between the top and bottom surfaces (13, 14) of a substrate (11) with the ends (16, 17) of the vias being substantially coplanar with the top and bottom surfaces. The method includes the steps of forming holes through the substrate, plating the interior of the holes with excess metal to fill the holes and extend beyond the ends of the holes, heating the substrate to cause the metal to melt and consolidate to form solid vias with domed ends, and lapping the top and bottom surfaces of the substrate to remove the domes. Conductive layers (21, 22) may then be formed over the vias. These layers may have windows over a portion of each via to provide an escape route for expanding fluids during further processing of the substrate.

Abstract translation: 一种形成在衬底（11）的顶表面和底表面（13,14）之间延伸的固体金属通孔（12）的方法，其中通孔的端部（16,17）与顶表面和底表面基本上共面。 该方法包括以下步骤：通过基底形成孔，用多余金属镀覆孔的内部以填充孔并延伸超过孔的端部，加热基底以使金属熔化并固结形成固体通孔， 半圆顶，并研磨衬底的顶部和底部表面以移除圆顶。 然后可以在通孔上方形成导电层（21,22）。 这些层可以在每个通孔的一部分上具有窗口，以在衬底的进一步处理期间提供用于膨胀流体的逸出路径。

公开(公告)号：WO2016109168A3

公开(公告)日：2016-10-27

申请号：PCT/US2015065504

申请日：2015-12-14

Applicant: 3M INNOVATIVE PROPERTIES CO

Inventor： GABRIEL NICHOLAS T ,  JESME RONALD D ,  OUDERKIRK ANDREW J ,  PALANISWAMY RAVI ,  BONIFAS ANDREW P ,  NARAG ALEJANDRO ALDRIN A II ,  JENNINGS ROBERT M ,  GORRELL ROBIN E

IPC: H05K1/02 ,  G06K19/077 ,  H01B5/00 ,  H01Q1/22 ,  H01Q1/38 ,  H05K1/16

CPC classification number: H05K1/0283 ,  G06K19/025 ,  H01Q1/2225 ,  H01Q1/36 ,  H05K1/165 ,  H05K2201/09263 ,  H05K2201/09272 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10098

Abstract: Electrical conductors are disclosed. More particularly, undulating electrical conductors 110 are disclosed. The conductors have varying width and a varying radius of curvature along the length of the conductor. The conductor comprises alternating first locations 114 and second locations 116 such that the conductor at each first location is wider than at each second location. Certain disclosed electrical conductors may be suitable to be disposed on flexible or stretchable substrates.

Abstract translation: 公开了电导体。 更具体地，公开了起伏的电导体110。 导体具有沿着导体长度的变化的宽度和变化的曲率半径。 导体包括交替的第一位置114和第二位置116，使得在每个第一位置处的导体比在每个第二位置处的导体宽。 某些公开的电导体可以适于设置在柔性或可拉伸的基底上。

公开(公告)号：WO2013074351A2

公开(公告)日：2013-05-23

申请号：PCT/US2012063950

申请日：2012-11-07

Applicant: S3C INC

Inventor： CASTAGNA JOSEPH

IPC: G01L9/00

CPC classification number: G01L9/00 ,  F16J15/064 ,  G01D11/245 ,  G01D11/26 ,  G01L19/0084 ,  G01L19/0672 ,  G01L19/143 ,  G01L19/148 ,  G01L19/149 ,  H05K1/0296 ,  H05K1/118 ,  H05K2201/09736 ,  H05K2201/09781

Abstract: The invention provides a submersible, electrically-powered sensor assembly that incorporates a flexible seal assembly having operative and non-operative electrical traces of a uniform vertical height for carrying clamping loads and avoiding signal loss along a signal carrying trace due to compression of the flex seal, minimizing fluid leak paths between two flange surfaces, providing stability in compression, and enabling electrical communication in an environment having an operating fluid.

Abstract translation: 本发明提供了一种潜水电动传感器组件，其包括柔性密封组件，其具有用于承载夹紧负载的均匀垂直高度的操作和非操作电迹线，并且避免了由于柔性密封件的压缩而沿着信号承载痕迹的信号损失 使两个法兰表面之间的流体泄漏路径最小化，提供压缩稳定性，以及在具有工作流体的环境中实现电通信。

公开(公告)号：WO2010064467A1

公开(公告)日：2010-06-10

申请号：PCT/JP2009/062683

申请日：2009-07-13

Applicant: イビデン株式会社

Inventor： 竹中　芳紀 ,  中村　武志

IPC: H05K3/46 ,  H05K3/22

CPC classification number: H05K3/465 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K2201/0373 ,  H05K2201/0949 ,  H05K2201/09736 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: 【課題】プレーン層を平坦に形成できる多層プリント配線板の製造方法を提供する。【解決手段】上層の層間樹脂絶縁層１５０のプレーン導体形成用の凹部１５３ａに凸部１５０ａが形成されている。このため、プレーン導体形成用の凹部１５３ａに銅めっきを充填する際に、該凹部１５３ａの側壁及び底面のみでなく、凸部１５０ａの周囲側壁でも銅が析出する。これにより、プレーン層１５９を平坦に形成することができる。

Abstract translation: 一种多层印刷线路板的制造方法，其中可以平坦地形成平面层。 在上层的层间树脂绝缘层（150）中的平面导体形成用凹部（153a）中形成突出部（150a）。 因此，当用于平面导体形成的凹部（153a）填充有铜电镀时，铜不仅沉积在凹部（153a）的侧壁和底表面上，而且沉积在突出部分（150a）的侧壁上 ）。 结果，平面层（159）可以形成为平坦的。

公开(公告)号：WO2009133969A3

公开(公告)日：2010-01-21

申请号：PCT/JP2009058794

申请日：2009-04-30

Applicant: PANASONIC ELEC WORKS CO LTD ,  YOSHIOKA SHINGO ,  FUJIWARA HIROAKI

Inventor： YOSHIOKA SHINGO ,  FUJIWARA HIROAKI

IPC: H05K1/02 ,  H05K1/16 ,  H05K3/10 ,  H05K3/18 ,  H05K3/46

CPC classification number: H05K3/107 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/0269 ,  H05K1/0284 ,  H05K1/111 ,  H05K1/162 ,  H05K3/0032 ,  H05K3/184 ,  H05K3/4647 ,  H05K3/465 ,  H05K3/4661 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/2072 ,  H05K2203/0108 ,  H05K2203/0565 ,  H05K2203/161

Abstract: The method of producing a multilayer circuit board includes a film-forming step of forming a swellable resin film on the surface of an insulative substrate, a circuit groove-forming step of forming circuit grooves having a depth equal to or greater than the thickness of the swellable resin film on the external surface of the swellable resin film, a catalyst-depositing step of depositing a plating catalyst on the surface of the circuit grooves and the surface of the swellable resin film, a film-separating step of swelling the swellable resin film with a particular liquid and then separating the swollen resin film, and a plating processing step of forming an electrolessly plated film only in the region where the plating catalyst or the plating catalyst formed from the plating catalyst precursor remains unseparated after separation of the swellable resin film.

Abstract translation: 制造多层电路板的方法包括在绝缘基板的表面上形成可溶胀树脂膜的成膜步骤，形成深度等于或等于厚度的电路槽的电路槽形成步骤 可膨胀树脂膜的外表面上的可溶胀树脂膜，在电路槽的表面和可溶胀树脂膜的表面上沉积电镀催化剂的催化剂沉积步骤，使可溶胀树脂膜溶胀的膜分离步骤 与特定的液体分离，然后分离溶胀的树脂膜，以及仅在可溶胀树脂膜分离之后，在镀催化剂或由电镀催化剂前体形成的镀催化剂保持未分离的区域中形成无电镀膜的电镀处理步骤 。

公开(公告)号：WO2009069987A3

公开(公告)日：2009-08-20

申请号：PCT/KR2008007088

申请日：2008-12-01

Applicant: LG ELECTRONICS INC ,  LEE KWANG TAE ,  LEE SUNG GUE ,  CHOI JAE BONG

Inventor： LEE KWANG TAE ,  LEE SUNG GUE ,  CHOI JAE BONG

IPC: H05K1/02

CPC classification number: H05K3/0097 ,  H05K1/0271 ,  H05K3/0052 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0169

Abstract: Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

Abstract translation: 公开了一种印刷电路板，包括：绝缘部件，其上限定有第一区域和第二区域;形成在第一区域上的电路图案;以及形成在第二区域上的支撑部件。

公开(公告)号：WO2009069987A2

公开(公告)日：2009-06-04

申请号：PCT/KR2008/007088

申请日：2008-12-01

Applicant: LG ELECTRONICS INC. ,  LEE, Kwang Tae ,  LEE, Sung Gue ,  CHOI, Jae Bong

Inventor： LEE, Kwang Tae ,  LEE, Sung Gue ,  CHOI, Jae Bong

IPC: H05K1/02

CPC classification number: H05K3/0097 ,  H05K1/0271 ,  H05K3/0052 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0169

Abstract: Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

Abstract translation: 本发明公开了一种印刷电路板，包括：绝缘构件，其上限定有第一区域和第二区域;电路图案，形成在第一区域上;以及支撑构件，形成在第二区域上。 / p>