公开(公告)号：US08023282B2

公开(公告)日：2011-09-20

申请号：US11856858

申请日：2007-09-18

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H01R12/16

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

公开(公告)号：US08014164B2

公开(公告)日：2011-09-06

申请号：US13015739

申请日：2011-01-28

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H05K7/00

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

公开(公告)号：US20110212631A1

公开(公告)日：2011-09-01

申请号：US13034066

申请日：2011-02-24

Applicant: Mituru IIDA

Inventor： Mituru IIDA

IPC: H01R12/79

CPC classification number: H01R12/62 ,  H01R12/52 ,  H01R12/55 ,  H05K1/141 ,  H05K3/3442 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/091 ,  H05K2201/09181 ,  H05K2201/1059 ,  H05K2201/2009

Abstract: A female circuit board for use with a male circuit board has electrically conductive projections. The female circuit board includes a flexible insulating film. The flexible insulating film includes insertion portions into which the conductive projections of the male circuit board are allowed to be inserted. Each of the insertion portions includes a plurality of slits communicating with each other at the center of each of the insertion portions. The flexible insulating film further includes electrically conduction portions for making contact with the conductive projections to come into conduction with the male circuit board. The conduction portions are disposed around the insertion portions on the surface of the female circuit board facing the male circuit board when the female circuit board is in contact with the male circuit board. The conduction portions conform in shape to the insertion portions.

Abstract translation: 与阳电路板一起使用的母电路板具有导电突起。 阴电路板包括柔性绝缘膜。 柔性绝缘膜包括允许插入阳电路板的导电突起的插入部分。 每个插入部分包括在每个插入部分的中心处彼此连通的多个狭缝。 柔性绝缘膜还包括用于与导电突起接触以与阳电路板导通的导电部分。 当阴电路板与阳电路板接触时，导电部分设置在阴电路板的面对阳电路板的表面上的插入部分周围。 导电部分的形状与插入部分一致。

公开(公告)号：US20110128033A1

公开(公告)日：2011-06-02

申请号：US12926441

申请日：2010-11-18

Applicant: Tetsuya Ohsawa ,  Hitoki Kanagawa

Inventor： Tetsuya Ohsawa ,  Hitoki Kanagawa

IPC: G01R31/304 ,  H05K1/00 ,  H05K3/30

CPC classification number: H05K3/326 ,  G11B5/455 ,  G11B5/486 ,  H05K1/056 ,  H05K1/118 ,  H05K3/305 ,  H05K3/4092 ,  H05K2201/091

Abstract: In a connection structure of an electronic component and a wired circuit board, the electronic component includes a plurality of external terminals. The wired circuit board includes a metal supporting board, an insulating base layer formed on the metal supporting board, and a conductive pattern formed on the insulating base layer. The conductive pattern includes a plurality of terminal portions for connection with the plurality of external terminals. The electronic component and the wired circuit board are disposed such that the plurality of external terminals and the plurality of terminal portions face each other. The wired circuit board is bent such that the conductive pattern is warped, and by the reaction force of the warping, the terminal portions and the external terminals are abutted, and the electronic component and the wired circuit board are electrically connected.

Abstract translation: 在电子部件和布线电路基板的连接结构中，电子部件包括多个外部端子。 布线电路板包括金属支撑板，形成在金属支撑板上的绝缘基底层和形成在绝缘基底层上的导电图案。 导电图案包括用于与多个外部端子连接的多个端子部分。 电子部件和布线电路基板被配置为使得多个外部端子和多个端子部彼此面对。 弯曲布线电路板使得导电图案翘曲，并且通过翘曲的反作用力使端子部分和外部端子抵接，并且电子部件和布线电路板电连接。

公开(公告)号：US20110124154A1

公开(公告)日：2011-05-26

申请号：US13015725

申请日：2011-01-28

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H01L21/50

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

公开(公告)号：US07943859B2

公开(公告)日：2011-05-17

申请号：US10593796

申请日：2005-03-29

Applicant: Tsugio Ambo ,  Satoru Fujiwara ,  Yoshikatsu Hasegawa ,  Chihiro Nakagawa ,  Takeshi Ono ,  Atsushi Urushidani ,  Tooru Kashioka ,  Katsuji Shimazawa

Inventor： Tsugio Ambo ,  Satoru Fujiwara ,  Yoshikatsu Hasegawa ,  Chihiro Nakagawa ,  Takeshi Ono ,  Atsushi Urushidani ,  Tooru Kashioka ,  Katsuji Shimazawa

IPC: H01R12/04

CPC classification number: H05K3/202 ,  H01R9/2466 ,  H01R12/523 ,  H05K3/041 ,  H05K3/222 ,  H05K3/308 ,  H05K3/326 ,  H05K3/328 ,  H05K3/4046 ,  H05K3/4611 ,  H05K13/0061 ,  H05K2201/0376 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/091 ,  H05K2201/096 ,  H05K2201/10287 ,  H05K2201/10401 ,  H05K2201/1059 ,  H05K2201/10598 ,  H05K2203/081 ,  H05K2203/082 ,  H05K2203/167 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T428/24917

Abstract: A circuit board with a simple structure is manufactured. A circuit board 19 has thereon a foil circuit 21 provided on a synthetic resin plate 20 formed by injection molding, made of a copper foil, and having a pattern different for circuit board 19. Anchor pins 20a projecting upward are provided on the resin plate 20 and passed through pinholes made in the foil circuit 21. The foil circuit 21 are positioned and secured to the resin plate 20. In a required portion of the resin plate 20, a terminal insertion hole 20c is provided, and receiving terminal 22 is secured to the required portion of the terminal insertion hole 20c and connected to the foil circuit 21.

Abstract translation: 制造具有简单结构的电路板。 电路板19上设置有箔电路21，该箔电路21设置在由铜箔制成的注塑成型的合成树脂板20上，并且具有不同于电路板19的图案。在树脂板20上设置有向上突出的锚定销20a 并通过箔片电路21中制成的针孔。箔片电路21定位并固定到树脂板20.在树脂板20的所需部分中，设置有端子插入孔20c，并且接收端子22固定到 端子插入孔20c的所需部分并连接到箔片电路21。

公开(公告)号：US07911801B2

公开(公告)日：2011-03-22

申请号：US12691782

申请日：2010-01-22

Applicant: Yuichi Iida ,  Osamu Chikagawa

Inventor： Yuichi Iida ,  Osamu Chikagawa

IPC: H05K1/18 ,  H05K7/14

CPC classification number: H05K1/186 ,  H05K1/0306 ,  H05K3/4629 ,  H05K2201/0195 ,  H05K2201/091 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T156/1002 ,  Y10T428/24322 ,  Y10T428/24612 ,  Y10T428/24926 ,  Y10T428/24942

Abstract: A laminate includes base material layers and interlayer constraining layers disposed therebetween. The base material layers are formed of a sintered body of a first powder including a glass material and a first ceramic material, and the interlayer constraining layer includes a second powder including a second ceramic material that will not be sintered at a temperature for melting the glass material, and is in such a state that the second powder adheres together by diffusion or flow of a portion of the first powder including the glass material included in the base material layer at the time of baking. The incorporated element is in such a state that an entire periphery thereof is covered with the interlayer constraining layer.

Abstract translation: 层压体包括基材层和设置在其间的层间约束层。 所述基材层由包含玻璃材料和第一陶瓷材料的第一粉末的烧结体形成，所述中间层约束层包括第二粉末，所述第二粉末包括在用于熔化所述玻璃的温度下不被烧结的第二陶瓷材料 并且处于这样的状态，即第二粉末通过在烘烤时包含在基材层中的包含玻璃材料的第一粉末的一部分的扩散或流动而粘附在一起。 所引入的元件处于其整个外围被层间限制层覆盖的状态。

公开(公告)号：US07907418B2

公开(公告)日：2011-03-15

申请号：US12628778

申请日：2009-12-01

Applicant: Pascal Meier ,  Sanjay Dabral

Inventor： Pascal Meier ,  Sanjay Dabral

IPC: H05K7/00

CPC classification number: H05K3/4611 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/024 ,  H05K1/112 ,  H05K1/147 ,  H05K3/0064 ,  H05K3/4084 ,  H05K2201/091 ,  H05K2201/09318 ,  H05K2201/10734 ,  Y10T29/49126

Abstract: A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract translation: 电路板可以包括第一和第二侧，在侧面之间的多个电路板层和位于相应的电路板层中的多个信号迹线。 电路板层和信号迹线可以从电路板的第一侧的第一部件连接区域延伸到电路板的第一侧的第二部件连接区域。 因此，信号迹线可以在组件连接区域之间形成通过电路板的不连续的信号路径。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

公开(公告)号：US20110048799A1

公开(公告)日：2011-03-03

申请号：US12857737

申请日：2010-08-17

Applicant: Sebastian Kisban ,  Stanislav Herwik ,  Patrick Ruther ,  Tobias Holzhammer ,  Oliver Paul

Inventor： Sebastian Kisban ,  Stanislav Herwik ,  Patrick Ruther ,  Tobias Holzhammer ,  Oliver Paul

IPC: H02G3/00 ,  B81C1/00

CPC classification number: B81C3/004 ,  B81B2201/12 ,  B81B2207/07 ,  B81C3/008 ,  H01R12/79 ,  H05K1/118 ,  H05K3/0058 ,  H05K3/326 ,  H05K3/365 ,  H05K2201/091 ,  H05K2201/1059 ,  Y10T29/49002

Abstract: In a process for assembling a microstructure (1), provision is made of a first microstructure piece (2) having a receiving recess (3) in its surface and a second microstructure piece (5) having a connecting region (6) fitting into the receiving recess (3) and on which is arranged at least one electrical contact element (7a, 7b). Provision is made of a flexible cable (8) having a flat substrate layer (9) made of an electrically insulating material and at least one strip conductor (10) arranged thereon. The cable (8) has at least one tongue (14a, 14b) on which is arranged at least one counter-contact element (11a, 11b) connected to the strip conductor (10). The cable (8) and the microstructure pieces (5) are positioned relative to each other in a preassembly position in which the connecting region (6) is opposite the receiving recess (3) and the tongue (14a, 14b) is aligned between the connecting region (6) and the receiving recess (3). The connecting region (6) is then introduced in the receiving recess (3) by displacement of the microstructure pieces (2, 5) toward one another. In doing so the at least one tongue (14a, 14b) is deflected in the receiving recess (3) in such a way that the at least one counter-contact element (11a, 11b) contacts the at least one contact element (7a, 7b).

Abstract translation: 在组装微结构（1）的方法中，提供在其表面上具有接收凹槽（3）的第一微结构件（2）和具有连接区域（6）的第二微结构件（5） 接收凹部（3），并且其上布置有至少一个电接触元件（7a，7b）。 设置有具有由电绝缘材料制成的平坦基底层（9）的柔性电缆（8）和布置在其上的至少一个带状导体（10）。 电缆（8）具有至少一个舌片（14a，14b），其上设置有至少一个连接到带状导体（10）的反接触元件（11a，11b）。 电缆（8）和微结构件（5）在连接区域（6）与容纳凹部（3）相对的预组装位置中相对定位，并且舌部（14a，14b）在 连接区域（6）和接收凹部（3）。 然后通过使微结构件（2,5）彼此移位将连接区域（6）引入到容纳凹部（3）中。 在这样做时，至少一个舌片（14a，14b）在接收凹部（3）中被偏转，使得至少一个反接触元件（11a，11b）接触至少一个接触元件（7a， 7b）。

公开(公告)号：US07829387B2

公开(公告)日：2010-11-09

申请号：US12385693

申请日：2009-04-16

Applicant: Masashi Yamasaki ,  Mutsumi Yoshino

Inventor： Masashi Yamasaki ,  Mutsumi Yoshino

IPC: H01L21/00

CPC classification number: H05K7/142 ,  H05K3/202 ,  H05K3/341 ,  H05K2201/091 ,  H05K2201/10598 ,  H05K2203/175 ,  Y10T29/49144

Abstract: An electronic apparatus includes metal wiring plates placed together in the same plane to provide a wiring circuit, electronic devices mounted to the wiring plates through a solder, a case having a base portion and columnar portions extending from the base portion. The wiring plates are fixed to the columnar portions such that the wiring circuit is spaced from the base portion. The wiring plates have an enough thickness to resist a large current for operating the electronic devices and to release heat generated by the electronic devices. The wiring circuit is spaced from the base portion of the case so that the heat generated by the electronic devices is released in the space efficiently. The electronic devices are soldered to the wiring plates at once in a thermal reflow process.

Abstract translation: 电子设备包括在同一平面上放置在一起以提供布线电路的金属布线板，通过焊料安装到布线板的电子设备，具有从基部延伸的基部和柱状部分的壳体。 布线板固定在柱状部分上，使得布线电路与基部间隔开。 布线板具有足够的厚度以抵抗用于操作电子设备的大电流并且释放由电子设备产生的热量。 布线电路与壳体的基部间隔开，使得由电子设备产生的热量有效地释放在空间中。 电子器件在热回流工艺中立即焊接到布线板上。