公开(公告)号：EP0416518A3

公开(公告)日：1993-01-27

申请号：EP90116931.8

申请日：1990-09-04

Applicant: IDEMITSU KOSAN COMPANY LIMITED

Inventor： Nakano, Akikazu

IPC: H05K1/03

CPC classification number: H05K1/0373 ,  H05K1/0366 ,  H05K3/022 ,  H05K2201/0129 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0239 ,  H05K2201/0248 ,  H05K2201/0251 ,  H05K2201/09118 ,  Y10T29/4916

Abstract: A process for producing a printed circuit board is disclosed, in which the following steps are sequentially conducted:
(1) a step for dispersing in at least one of the mediums of water and an organic solvent
(A) 95 to 20% by weight of a styrene polymer having a syndiotactic structure, (B) 5 to 80% by weight of a fibrous filler having a fiber length of 1 to 50 mm, and (C) 0.1 to 30 parts by weight of at least one of a binder and a binding fiber in proportion to 100 parts by weight of the total amount of said components (A) and (B), to make a slurry having a concentration of 0.5 to 100 g/l, (2) a sedimentation step of the dispersed solids in said slurry, (3) a step for removing at least one of the mediums of water and an organic solvent in the slurry by filtration and drying and molding the residue, (4) a step for melting with heating and pressure forming the molded product, and (5) a step for providing a metal layer on the molded article. The printed circuit board obtained by the process is excellent in impact resistance, heat resistance, mechanical strength and size stability as well as dielectric properties.

公开(公告)号：EP0229495B1

公开(公告)日：1990-09-12

申请号：EP86309669.9

申请日：1986-12-11

Applicant: TOSOH CORPORATION ,  HODOGAYA CHEMICAL CO., LTD.

Inventor： Sato, Masatoshi ,  Ogawara, Kensuke ,  Emura, Noriaki

IPC: C08L81/02 ,  C08J5/04

CPC classification number: H05K1/0373 ,  C08K7/08 ,  C08K7/14 ,  C08K2201/016 ,  H05K1/0228 ,  H05K2201/0209 ,  H05K2201/0248 ,  H05K2201/0251 ,  Y10T428/24355 ,  Y10T428/31533 ,  C08L81/02

公开(公告)号：EP0382557A1

公开(公告)日：1990-08-16

申请号：EP90301398.5

申请日：1990-02-09

Applicant: JUNKOSHA CO. LTD.

Inventor： Sato, Yoshiaki, ,  Hoshiko, Takeshi

IPC: H01B3/00 ,  C08K9/06 ,  H05K1/03

CPC classification number: B32B27/16 ,  B32B15/08 ,  B32B27/20 ,  B32B2307/204 ,  B32B2307/7246 ,  B32B2457/08 ,  C08K9/06 ,  H01B3/445 ,  H05K1/0366 ,  H05K1/0373 ,  H05K2201/0209 ,  H05K2201/0239 ,  H05K2201/0245 ,  H05K2201/0248 ,  H05K2201/0254 ,  H05K2201/0323

Abstract: A moisture resistant dielectric material which is formed by dispersing in an insulating high polymer material an inorganic filler material which has been surface treated with a fluorine-based silane coupling agent, especially
CF₃(CF₂)₇(CH₂)₂Si(OCH₃)₃

Abstract translation: 通过在绝缘高分子材料中分散无机填料形成的防潮电介质材料，该无机填料已用氟基硅烷偶联剂，特别是CF 3（CF 2）7（CH 2）2 Si（OCH 3）3

公开(公告)号：US09812418B2

公开(公告)日：2017-11-07

申请号：US15351992

申请日：2016-11-15

Applicant: Fujitsu Limited

Inventor： Kozo Shimizu ,  Seiki Sakuyama

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/367 ,  H01L25/00 ,  B23K1/00 ,  B23K3/08 ,  H01L23/31 ,  H01L23/488 ,  H01L23/498 ,  B23K35/02 ,  B23K35/26 ,  H05K1/02 ,  H05K3/34 ,  H01L23/14 ,  B23K101/40 ,  B23K101/42 ,  H05K1/09 ,  H05K1/11

CPC classification number: H01L24/17 ,  B23K1/0008 ,  B23K1/0016 ,  B23K3/085 ,  B23K35/0244 ,  B23K35/262 ,  B23K35/264 ,  B23K2101/40 ,  B23K2101/42 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/13016 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16157 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/16505 ,  H01L2224/16507 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/75253 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/759 ,  H01L2224/81005 ,  H01L2224/81075 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81411 ,  H01L2224/81815 ,  H01L2224/81948 ,  H01L2224/81986 ,  H01L2225/06513 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/1579 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1659 ,  H01L2924/16747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K1/0203 ,  H05K1/09 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/0248 ,  H05K2201/09972 ,  H05K2201/1056 ,  H05K2203/1121 ,  H05K2203/304 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/00

Abstract: An electronic apparatus includes a first electronic part with a first terminal, a second electronic part with a second terminal opposite the first terminal, and a joining portion which joins the first terminal and the second terminal. The joining portion contains a pole-like compound extending in a direction in which the first terminal and the second terminal are opposite to each other. The joining portion contains the pole-like compound, so the strength of the joining portion is improved. When the first terminal and the second terminal are joined, the temperature of one of the first electronic part and the second electronic part is made higher than that of the other. A joining material is cooled and solidified in this state. By doing so, the pole-like compound is formed.

公开(公告)号：US09173282B2

公开(公告)日：2015-10-27

申请号：US13638536

申请日：2011-03-31

Applicant: Pulugurtha Markondeya Raj ,  Nitesh Kumbhat ,  Venkatesh Sundaram ,  Rao R. Tummala

Inventor： Pulugurtha Markondeya Raj ,  Nitesh Kumbhat ,  Venkatesh Sundaram ,  Rao R. Tummala

IPC: H01R9/00 ,  H05K1/02 ,  H01L23/498 ,  H01L25/065 ,  H01R12/52 ,  H01R12/71 ,  H05K3/34 ,  H05K1/18 ,  H05K3/10 ,  H01L29/41 ,  H01L23/13 ,  H01L25/10 ,  H01L23/00

CPC classification number: H05K1/0213 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L29/413 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/45147 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81385 ,  H01L2224/81399 ,  H01L2224/81815 ,  H01L2224/8182 ,  H01L2224/8185 ,  H01L2224/81897 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/15791 ,  H01R12/52 ,  H01R12/714 ,  H05K1/18 ,  H05K3/107 ,  H05K3/3436 ,  H05K2201/0248 ,  H05K2201/0281 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/48

Abstract: The various embodiments of the present invention provide a stress-relieving, second-level interconnect structure that is low-cost and accommodates TCE mismatch between low-TCE packages and PCBs. The various embodiments of the interconnect structure are reworkable and can be scaled to pitches from about 1 millimeter (mm) to about 150 micrometers (μm). The interconnect structure comprises a dielectric body element and at least one interconnection array that provides a conductive path between two electronic components. Each interconnection array comprises a plurality of wires that provide both conductivity and compliance to the overall interconnect structure. The versatility and scalability of the interconnect structure of the present invention make it a desirable structure to utilize in current two-dimensional and ever-evolving three-dimensional IC structures.

Abstract translation: 本发明的各种实施例提供了一种应力消除的二级互连结构，其低成本并且适应低TCE封装和PCB之间的TCE不匹配。 互连结构的各种实施例是可再加工的，并且可以缩放到约1毫米（mm）至约150微米（μm）的间距。 互连结构包括介电体元件和提供两个电子部件之间的导电路径的至少一个互连阵列。 每个互连阵列包括提供导电性和整体互连结构的柔性的多条导线。 本发明的互连结构的多功能性和可扩展性使其成为在目前的二维和不断发展的三维IC结构中使用的理想结构。

公开(公告)号：US08940193B2

公开(公告)日：2015-01-27

申请号：US13158356

申请日：2011-06-10

Applicant: Lex Kosowsky ,  Robert Fleming

Inventor： Lex Kosowsky ,  Robert Fleming

IPC: H01B1/06 ,  H01B1/12 ,  H01C7/10 ,  B05D5/12 ,  B82Y10/00 ,  H01B1/22 ,  H01B1/24 ,  H01C7/105 ,  H01C17/065 ,  H05K1/02 ,  H05K3/18 ,  H05K1/03 ,  H05K1/16

CPC classification number: H01C7/1006 ,  B82Y10/00 ,  H01B1/22 ,  H01B1/24 ,  H01C7/105 ,  H01C17/0652 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/188 ,  H05K2201/0248 ,  H05K2201/0257 ,  H05K2201/026 ,  H05K2201/0272 ,  H05K2201/0738 ,  H05K2203/0723 ,  H05K2203/105 ,  Y10S977/742 ,  Y10S977/779 ,  Y10T428/30 ,  Y10T428/31678

Abstract: One or more embodiments provide for a device that utilizes voltage switchable dielectric material having semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material on the device.

Abstract translation: 一个或多个实施例提供了一种使用具有半导体或导电材料的电压可切换介电材料的器件，该器件具有相对较高的纵横比，以便增强器件上的VSD材料的机械和电学特性。

公开(公告)号：US08819926B2

公开(公告)日：2014-09-02

申请号：US13366316

申请日：2012-02-04

Applicant: Mehdi M Yazdanpanah ,  Romaneh Jalilian

Inventor： Mehdi M Yazdanpanah ,  Romaneh Jalilian

IPC: H01R43/00

CPC classification number: H05K3/222 ,  G01N35/10 ,  H01J2237/208 ,  H01J2237/31732 ,  H01J2237/31745 ,  H01J2237/31749 ,  H01L21/76892 ,  H05K2201/0248 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49718 ,  Y10T29/49721 ,  Y10T29/49726 ,  Y10T29/4973

Abstract: Embodiments of the present invention provide method and apparatus of restoring probes attached to the manipulator in a control environment (e.g. vacuum chamber of an focus ion beam) without a need to open the vacuum chamber. Another embodiment of the present invention teaches construction and application of various shapes of nanoforks from a nanoneedles array inside a FIB vacuum chamber. In another embodiment, the present invention teaches edition and correction of completed and oxide-coated circuit boards by re-nano-wiring using nanoneedles of a nanoneedles array (as nanowire supply), contained in the same controlled space. In this embodiment, individual nanoneedles in a nanoneedle array are manipulated by a manipulator and placed in such a way to make electrical contact between the desired points.

Abstract translation: 本发明的实施例提供了在控制环境（例如聚焦离子束的真空室）中恢复附接到操纵器的探针的方法和装置，而不需要打开真空室。 本发明的另一个实施方案教导了在FIB真空室内的纳米针阵列中构造和应用各种形状的纳摩耳。 在另一个实施例中，本发明通过使用包含在相同受控空间中的纳米针阵列（作为纳米线供应）的纳米针通过再纳米布线来教导完成的和氧化物涂覆的电路板的编辑和校正。 在该实施例中，纳米针阵列中的单个纳米针由操纵器操纵并且以这样的方式放置以在期望的点之间进行电接触。

公开(公告)号：US08766437B2

公开(公告)日：2014-07-01

申请号：US13060845

申请日：2010-04-13

Applicant: Masamichi Yamamoto ,  Kyouichirou Nakatsugi ,  Takashi Yamaguchi ,  Shigeki Kawakami ,  Michihiro Kimura

Inventor： Masamichi Yamamoto ,  Kyouichirou Nakatsugi ,  Takashi Yamaguchi ,  Shigeki Kawakami ,  Michihiro Kimura

IPC: H01L23/48

CPC classification number: H05K3/282 ,  H01L2924/0002 ,  H05K1/148 ,  H05K3/305 ,  H05K3/323 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/0248 ,  H05K2201/0373 ,  H05K2201/083 ,  H05K2201/10977 ,  H05K2203/104 ,  Y10T29/49213 ,  H01L2924/00

Abstract: There is provided an electrode structure to be electrically connected to a connection conductor by being bonded thereto with an anisotropic conductive adhesive mainly composed of a thermosetting resin, the electrode structure including an electrode for connection using an adhesive, the electrode being arranged on a base material, and an organic film serving as an oxidation preventing film configured to cover a surface of the electrode for connection using an adhesive, in which the organic film has a higher decomposition temperature than the maximum temperature of heat treatment to be performed. A wiring body and a connecting structure using an adhesive are also provided.

Abstract translation: 提供了一种电极结构，其通过用主要由热固性树脂构成的各向异性导电粘合剂与连接导体电连接，该电极结构包括使用粘合剂连接的电极，该电极设置在基材上 以及作为氧化防止膜的有机膜，其被配置为使用粘合剂覆盖用于连接的电极的表面，其中有机膜具有比要进行的热处理的最高温度更高的分解温度。 还提供了布线体和使用粘合剂的连接结构。

公开(公告)号：US08763525B2

公开(公告)日：2014-07-01

申请号：US13294355

申请日：2011-11-11

Applicant: Mathew T. Stebbins ,  Chaofeng Zou ,  Jennifer C. Dawson ,  Karissa L. Eckert ,  Gary E. Labelle

Inventor： Mathew T. Stebbins ,  Chaofeng Zou ,  Jennifer C. Dawson ,  Karissa L. Eckert ,  Gary E. Labelle

IPC: B41M1/10 ,  H05K1/09 ,  H01B1/22 ,  H05K3/12

CPC classification number: H05K1/095 ,  B41M1/10 ,  H01B1/22 ,  H05K3/1275 ,  H05K2201/0108 ,  H05K2201/0248 ,  H05K2201/026

Abstract: Methods and compositions are disclosed and claimed for gravure printing of transparent conductive films comprising metal nanowires. Such films exhibiting low resistivity and superior coating uniformity may be used in electronic or optical articles.

Abstract translation: 公开和要求保护用于凹版印刷包含金属纳米线的透明导电膜的方法和组合物。 具有低电阻率和优异的涂层均匀性的这种膜可以用于电子或光学制品中。

公开(公告)号：US20130107485A1

公开(公告)日：2013-05-02

申请号：US13638536

申请日：2011-03-31

Applicant: Pulugurtha Markondeya Raj ,  Nitesh Kumbhat ,  Venkatesh Sundaram ,  Rao R. Tummala

Inventor： Pulugurtha Markondeya Raj ,  Nitesh Kumbhat ,  Venkatesh Sundaram ,  Rao R. Tummala

IPC: H05K1/02 ,  H05K3/10 ,  H05K1/18

CPC classification number: H05K1/0213 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L29/413 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/45147 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81385 ,  H01L2224/81399 ,  H01L2224/81815 ,  H01L2224/8182 ,  H01L2224/8185 ,  H01L2224/81897 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/15791 ,  H01R12/52 ,  H01R12/714 ,  H05K1/18 ,  H05K3/107 ,  H05K3/3436 ,  H05K2201/0248 ,  H05K2201/0281 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/48

Abstract: The various embodiments of the present invention provide a stress-relieving, second-level interconnect structure that is low-cost and accommodates TCE mismatch between low-TCE packages and PCBs. The various embodiments of the interconnect structure are reworkable and can be scaled to pitches from about 1 millimeter (mm) to about 150 micrometers (μm). The interconnect structure comprises a dielectric body element and at least one interconnection array that provides a conductive path between two electronic components. Each interconnection array comprises a plurality of wires that provide both conductivity and compliance to the overall interconnect structure. The versatility and scalability of the interconnect structure of the present invention make it a desirable structure to utilize in current two-dimensional and ever-evolving three-dimensional IC structures.

Abstract translation: 本发明的各种实施例提供了一种应力消除的二级互连结构，其低成本并且适应低TCE封装和PCB之间的TCE不匹配。 互连结构的各种实施例是可再加工的，并且可以缩放到约1毫米（mm）至约150微米（母体）的间距。 互连结构包括介电体元件和提供两个电子部件之间的导电路径的至少一个互连阵列。 每个互连阵列包括提供导电性和整体互连结构的柔性的多条导线。 本发明的互连结构的多功能性和可扩展性使其成为在目前的二维和不断发展的三维IC结构中使用的理想结构。