公开(公告)号：ZA201408076B

公开(公告)日：2019-05-29

申请号：ZA201408076

申请日：2014-11-04

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  ROGERS ROBERT

Abstract: Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

公开(公告)号：PL2862089T3

公开(公告)日：2019-04-30

申请号：PL12879101

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  ROGERS ROBERT ,  SITTMANN GUSTAV

IPC: G06F12/10 ,  G06F9/30 ,  G06F9/38 ,  G06F12/1009 ,  G06F12/1027

公开(公告)号：DK2862089T3

公开(公告)日：2019-02-25

申请号：DK12879101

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  ROGERS ROBERT ,  SITTMANN GUSTAV

IPC: G06F12/10 ,  G06F12/1009 ,  G06F12/1027

公开(公告)号：LT2862089T

公开(公告)日：2019-02-11

申请号：LT12879101

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  ROGERS ROBERT ,  SITTMANN GUSTAV

IPC: G06F12/10 ,  G06F9/30 ,  G06F9/38 ,  G06F12/1009 ,  G06F12/1027

公开(公告)号：SI2862080T1

公开(公告)日：2018-12-31

申请号：SI201331247

申请日：2013-06-12

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  OSISEK DAMIAN LEO

IPC: G06F13/00 ,  G06F9/00 ,  G06F11/00

公开(公告)号：HRP20181576T1

公开(公告)日：2018-11-30

申请号：HRP20181576

申请日：2018-10-02

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F11/07 ,  G06F9/38 ,  G06F11/36

公开(公告)号：ZA201703081B

公开(公告)日：2018-11-28

申请号：ZA201703081

申请日：2017-05-04

Applicant: IBM

Inventor： GAINEY CHARLES (DECEASED) ,  LEHNERT FRANK ,  BRADBURY JONATHAN DAVID ,  OSISEK DAMIAN ,  BUSABA FADI YUSUF ,  SLEGEL TIMOTHY ,  GREINER DAN ,  SCHMIDT DONALD WILLIAM ,  KUBALA JEFFREY PAUL ,  HELLER LISA ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  NERZ BERND

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

公开(公告)号：DK2834739T3

公开(公告)日：2018-10-22

申请号：DK12878813

申请日：2012-11-22

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F9/38 ,  G06F11/07 ,  G06F11/36

公开(公告)号：CA3037277A1

公开(公告)日：2018-07-26

申请号：CA3037277

申请日：2018-01-12

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  SHUM CHUNG-LUNG ,  OSISEK DAMIAN

IPC: G06F12/02 ,  G06F9/455

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

公开(公告)号：AU2015238632B2

公开(公告)日：2018-04-26

申请号：AU2015238632

申请日：2015-03-19

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES ,  JACOBI CHRISTIAN

IPC: G06F9/50 ,  G06F9/38

Abstract: Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread, and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. The computer system also includes a multithreading facility configured to control the configuration to perform a method. The method includes executing in the primary thread in the ST mode, an MT mode setting instruction. A number of threads requested is obtained from a location specified by the MT mode setting instruction. Based on determining that the number of threads requested indicates multiple threads, the MT mode is enabled to execute the multiple threads including the primary thread and the one or more secondary threads.