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公开(公告)号：JPS62191730A
公开(公告)日：1987-08-22
申请号：JP2798587
申请日：1987-02-09
Applicant: MARELLI AUTRONICA
Inventor： ROBERUTO DERU ATSUKUA , JIYUSETSUPE DERU ORUTO , JIRUBERUTO DENDEI
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公开(公告)号：JP2582840B2
公开(公告)日：1997-02-19
申请号：JP4853488
申请日：1988-03-01
Applicant: MARELLI AUTRONICA
Inventor： GIUZETSUPE CHIRIBERUTO , GUIDO SUKORURO
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公开(公告)号：JPH0772270A
公开(公告)日：1995-03-17
申请号：JP1033094
申请日：1994-02-01
Applicant: ST MICROELECTRONICS SRL , MARELLI AUTRONICA
Inventor： LOMBRESCHI GIAMPAOLO , BRAMBILLA MASSIMILIANO
Abstract: PURPOSE: To provide a circuit capable of generating control pulse trains in various operating conditions by using one specified bit counter for both of a normally operating condition and a one-operation time reset condition. CONSTITUTION: An input part receives three types of signals, a signal CLOCK, a signal RESET and a signal PULSE. The signal CLOCK is input to a frequency: division 4 to generate two frequency signals. A counter: 50M2 is provided with a counter 2A to generate a signal SX with the second frequency, which is a quick clock time reset pulse basic signal SX with high and low logic conditions. A multiplexer MUX 3 selectively sends both of a quick time reset signal SX and a slow time reset signal SN as the functions of a signal SECS to an output part S1 or S2 in a circuit. A counter: 11 bit 1 receives the signal PULSE, the signal RESET, the signal QSX and the first frequency signal to selectively control the reversion of a current in a clock motor.
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公开(公告)号：JPH05133312A
公开(公告)日：1993-05-28
申请号：JP5439191
申请日：1991-03-19
Applicant: MARELLI AUTRONICA
Inventor： JIYURIAANO CHIKAREESE , MARUKO DEIAKO , JIYANRUIIJI MOREERO
Abstract: PURPOSE: To prevent the generation of supervoltage in a secondary coil by raising the gate voltage of a transistor gradually and cutting off the transistor after current in a primary coil is increased progressively. CONSTITUTION: A pulse generator 10 generates pulses in a frequency higher than the reciprocal of the minimum time interval of the two changes of a control logic signal from a control unit 5. When the unit 5 outputs a signal C during engine operation, a transistor 6 is cut-off. Drain current VD is maintained at high level. When gate potential of the transistor 6 reaches the conductive level, the drain current VD is lowered promptly across a threshold with respect to a comparator 12. At that time, the comparator 12 supplies a signal P from the pulse generator 10 to a current generator to increase the gate potential of the transistor 6 gradually in response to each pulse of the signal P, and reduce the drain potential progressively. In this way, it is possible to prevent overvoltage in a secondary coil and the generation of wrong spark.
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公开(公告)号：JPH0595255A
公开(公告)日：1993-04-16
申请号：JP34485091
申请日：1991-12-26
Applicant: SGS THOMSON MICROELECTRONICS , MARELLI AUTRONICA
Inventor： BANI PORETSUTO , MIKERANJIERO MATSUZUUKO
IPC: H03K3/0233
Abstract: PURPOSE: To provide a comparing circuit having such hysteresis that an operation state which is totally satisfied as to, specially, the precision of hysteresis and high input impedance is obtained although this device has the feature that it can be manufactured in the form of a monolithic integrated circuit. CONSTITUTION: The hysteresis of the comparing circuit is determined in principle by a band gap reference voltage and a current I0 generated by a current generator with the internal resistance of the circuit and resistances Rx and Ry connected to the emitters of input part transistors Q1 and Q2, so that the hysteresis can be obtained with high precision. The input part of the circuit is composed of the input part transistors Q1 and Q2, so it has high impedance.
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Patent Agency Ranking
公开(公告)号：JPH03190075A
公开(公告)日：1991-08-20
申请号：JP30230490
申请日：1990-11-06
Applicant: MARELLI AUTRONICA
Inventor： JIYON ROPESU , KARURO MAJIYOONI
Abstract: PURPOSE: To quickly perform an assembly work by laying a substrate for each module, and forming a multipolar electrical connection part. CONSTITUTION: An electric circuit assembly has a housing 1 and a plurality of modules M are arranged within the housing 1. Also, the housing 1 has frames 7 and 8 made of insulating elastomer material. Furthermore, the circuit boards 9 of the modules M have the same size, and a plurality of connecting terminals 10 at the same position on the edge centers thereof. When the modules M are assembled, the conductive element 11 of the frame 8 contacts the respective terminals of the related circuit boards 10 in good order. In this case, each of module elements 7, 12 and 13 has a hole corresponding to the hole 5 of the end plate 3 of the housing 1, and is tightened with a connecting bolt 6. According to this construction, the modules M can be quickly assembled, due to the characteristics thereof.
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公开(公告)号：JPH03167699A
公开(公告)日：1991-07-19
申请号：JP27888390
申请日：1990-10-16
Applicant: MARELLI AUTRONICA
Inventor： FURANKO MAROBERUTEI , JINO PORITO , FURANKO SARERUNO
Abstract: PURPOSE: To sample-process input signals in the same phase regardless of the polarity by sample-processing the input signals during the only phase period of a clock for stipulating the operation of a switching capacitor circuit. CONSTITUTION: An FF circuit 12 is operated by phase signals -ψ2 and outputs signals Q and Q and the switches Sa-Sd of multiplexers MA and MB are controlled by the signals Q and Q. During an integration phase, the input signals Vin are sample-processed during the ON period of the phase signals ψ2 in a rectification and integration circuit 2-3. When the signals Vin are the positive polarity, the multiplexers MA and MB match the phase ψA with the phase ψ1 and the phase ψB with the phase ψ2 . Thus, the signals Vin are integration- processed by an integration capacitor C3 in a non-inversion mode in the period of the phase ψ1 . On the other hand, when the signals Vin are the negative polarity, the multiplexers MA and MB match the phase ψA with the ψ2 and phase ψB with the ψ1 . In this case, the capacitor C, integrationprocesses the signals in an inversion mode.
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公开(公告)号：JPH02257032A
公开(公告)日：1990-10-17
申请号：JP16649489
申请日：1989-06-28
Applicant: MARELLI AUTRONICA
Inventor： JINO PORITO , FURANKO MAROBERUCHI
Abstract: PURPOSE: To obtain an excellent signal/noise ratio by providing a line which recognizes the first two peaks of pinking signals at the time of detecting the pinking of an internal combustion engine which occurs when an explosive mixture is exploded by automatic ignition and two monitoring lines which decide the level of noise. CONSTITUTION: A method and device for detecting pinking are based on the monitoring of a signal from a vibration-type acceleration sensor S in two bands, for example, 8kHz and 13.8kHz in which peaks indicating the presence of pinking appear. Then the signal component is compared with a noise component, but the executing method of this comparison varies depending upon whether or not the signal intensity detected in response to the second peak (13.8kHz) reaches a prescribed minimum level proportional to the signal intensity detected in response to the first peak (8kHz). When a noise signal component exceeds a noise component multiplied by a prescribed magnification, the occurrence of the pinking is indicated by adding an offset voltage.
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公开(公告)号：JPH02202116A
公开(公告)日：1990-08-10
申请号：JP30635489
申请日：1989-11-24
Applicant: MARELLI AUTRONICA
Inventor： CHIESARIO CHIANCHI , JIYUZETSUPE CHIRIBERUTO
IPC: G01D5/244 , G01D5/245 , G01R19/175 , H03K5/1536
Abstract: PURPOSE: To improve reliability by providing a stopping means for immediately disabling a logic circuit after a first comparing means transmits a related signal indicating the zero cross of a sensor signal to the logic circuit. CONSTITUTION: This circuit is provided with a stopping means E for immediately disabling a logic circuit D after a first comparing means A transmits a related signal V1 to the logic circuit D. A time range in which the logic circuit D is opened by the operated result of the stopping circuit E ends at a point of time (t)0 , and therefore, it substantially precedes a point of time (t)1 when the operation pulling of the circuit E ends. Then, disturbance by any pulse with amplitude larger than a threshold level S1 fetched in the 'open' state of the logic circuit D can be avoided. Thus, when another zero cross signal is generated between the points of time (t)0 and (t)1 , an error can be identified, and reliability can be improved.
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公开(公告)号：JPH02179296A
公开(公告)日：1990-07-12
申请号：JP27697989
申请日：1989-10-24
Applicant: MARELLI AUTRONICA
Inventor： MARUKO KARUFUSU , RUCHIAANO PAUTATSUSO
Abstract: PURPOSE: To surely control a throttle valve at a predetermined static position at the time of idling by using a square wave signal having variable duty cycle as a signal for driving a DC motor, and forward or reversely rotating the motor according to change of the cycle. CONSTITUTION: A static position of a throttle valve B with respect to an idling speed is controlled by a DC motor M, which is driven by a controller C. A square wave signal S, output from an electronic control unit ECU, is supplied to an input unit (i) of the controller C. The cycle of the signal S is variable, and a code indicating amplitude and direction of change from its 50% designates the amplitude and direction of desired rotating speed of the motor M. The unit ECU receives a signal from a position sensor P, coupled to the valve B. A driver E flows a current in one direction or reverse direction with respect to the motor M, when the signal to be supplied is a high or low level.
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