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    태양 전지
    24.
    发明公开
    태양 전지 无效
    太阳能电池

    公开(公告)号：KR1020120111657A

    公开(公告)日：2012-10-10

    申请号：KR1020110030280

    申请日：2011-04-01

    Applicant: 삼성전자주식회사

    Inventor： 최영문 ,  김윤기 ,  김동균 ,  김덕기 ,  도은철

    IPC: H01L31/042

    CPC classification number: H01L31/0504 ,  H01L31/043 ,  H01L2924/0002 ,  Y02E10/50 ,  H01L2924/00

    Abstract: PURPOSE: A solar battery is provided to enhance generation efficiency by arranging photoelectric bodies which have different energy band-gaps to different layers and then parallely or serially interlinking the photoelectric bodies. CONSTITUTION: A plurality of unit cells is formed into a layer structure. The layer structure comprises a plurality of photoelectric bodies(10,20) and one or more insulating layers(30). The insulating layer is placed between the photoelectric bodies. The photoelectric bodies of different layers have different energy band-gaps. The photoelectric bodies of same layer are electrically connected. The photoelectric bodies of the same layer create current and voltage of the same size. The photoelectric bodies of different layers create currents and voltages of different sizes.

    Abstract translation: 目的：提供太阳能电池以通过将具有不同能带的光电体布置在不同的层上，然后平行或串联连接光电体来提高发电效率。 构成：多个单位电池形成层结构。 层结构包括多个光电体（10,20）和一个或多个绝缘层（30）。 绝缘层位于光电体之间。 不同层的光电体具有不同的能带隙。 相同层的光电体电连接。 同一层的光电体产生相同尺寸的电流和电压。 不同层的光电体产生不同尺寸的电流和电压。

    이-퓨즈 구조체를 포함하는 반도체 소자 및 그 제조 방법
    25.
    发明公开
    이-퓨즈 구조체를 포함하는 반도체 소자 및 그 제조 방법 有权
    具有电子熔断器结构的半导体器件及其制造方法

    公开(公告)号：KR1020110122519A

    公开(公告)日：2011-11-10

    申请号：KR1020100042075

    申请日：2010-05-04

    Applicant: 삼성전자주식회사

    Inventor： 김덕기

    IPC: H01L23/62

    CPC classification number: H01L23/5382 ,  H01L21/28273 ,  H01L23/5252 ,  H01L23/5256 ,  H01L23/544 ,  H01L27/0629 ,  H01L27/11526 ,  H01L27/11531 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66825 ,  H01L29/7848 ,  H01L29/788 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L23/62 ,  H01L2924/00

    Abstract: PURPOSE: A semiconductor device and a manufacturing method thereof are provided to produce an optimized e-fuse structure for high integration by forming a floating pattern to be a structurally floated state. CONSTITUTION: A substrate comprises a first area(70), a second area(80), and a third area(90) which are arranged to be separated. A e-fuse structure(200) is formed in the first area. A first MOS(Metal Oxide Semiconductor) transistor(210) is formed in the second area. A second MOS transistor(220) is formed in the third area. A device isolation pattern is arranged to define active units(ACT1, ACT2, ACT3) in the substrate.

    Abstract translation: 目的：提供一种半导体器件及其制造方法，以通过将浮动图案形成为结构浮动状态来产生用于高集成度的优化的电熔丝结构。 构成：衬底包括布置成分离的第一区域（70），第二区域（80）和第三区域（90）。 在第一区域中形成电熔丝结构（200）。 在第二区域中形成第一MOS（金属氧化物半导体）晶体管（210）。 在第三区域中形成第二MOS晶体管（220）。 布置器件隔离图案以定义衬底中的有源单元（ACT1，ACT2，ACT3）。

    비휘발성 메모리 소자
    26.
    发明公开
    비휘발성 메모리 소자 无效
    非易失性存储器件

    公开(公告)号：KR1020110054088A

    公开(公告)日：2011-05-25

    申请号：KR1020090110594

    申请日：2009-11-17

    Applicant: 삼성전자주식회사

    Inventor： 김덕기 ,  조중래

    IPC: H01L27/115 ,  H01L23/62 ,  H01L21/8247

    CPC classification number: H01L45/146 ,  H01L27/249 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1666 ,  H01L23/5252

    Abstract: PURPOSE: A nonvolatile memory device is provided to implement high integration by increasing the number of laminated horizontal electrodes. CONSTITUTION: A plurality of horizontal electrodes(10) are laminated as a plurality of layers. A plurality of vertical electrodes(20) is arranged to have an intersection with the plurality of horizontal electrodes. One data layer is interposed on the intersection and has a metal-insulation property. An anti-fuse layer(40) is serially connected to one data layer. The threshold voltage of one data layer is smaller than the breakdown voltage of the anti-fuse layer.

    Abstract translation: 目的：提供一种非易失性存储器件，通过增加层压水平电极的数量来实现高集成度。 构成：多个水平电极（10）被层叠成多个层。 多个垂直电极（20）布置成与多个水平电极交叉。 一个数据层插在交叉点上并具有金属绝缘性能。 反熔丝层（40）串联连接到一个数据层。 一个数据层的阈值电压小于反熔丝层的击穿电压。

    비휘발성 메모리 소자
    27.
    发明公开
    비휘발성 메모리 소자 有权
    非易失性存储器件

    公开(公告)号：KR1020100104860A

    公开(公告)日：2010-09-29

    申请号：KR1020090023543

    申请日：2009-03-19

    Applicant: 삼성전자주식회사

    Inventor： 설광수 ,  박윤동 ,  김덕기 ,  최상준

    IPC: H01L27/115 ,  H01L21/8247

    CPC classification number: H01L27/2445 ,  H01L27/2436 ,  H01L27/249 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/143

    Abstract: PURPOSE: The non-volatile memory device adds the lamination number of first electrode lines. It is highly integrated with the making high capacity. CONSTITUTION: A pair of first electrode lines(115a, 115b) is at least formed in the top of the substrate. The element structure(149) is at least allowed in above statement between a pair of first electrode lines. The dielectric layer(130) is formed between the element structure and pair of first electrode lines. The element structure comprises 2 electrode line(140a), and the resistance alteration material layer and channel body(135).

    Abstract translation: 目的：非易失性存储器件添加第一电极线的层叠数。 它与高容量高度集成。 构成：至少在衬底的顶部形成一对第一电极线（115a，115b）。 元件结构（149）至少允许在一对第一电极线之间的上述语句中。 介电层（130）形成在元件结构和一对第一电极线之间。 元件结构包括2电极线（140a）和电阻改变材料层和通道体（135）。

    전기적 퓨즈 소자 및 그의 동작방법
    28.
    发明公开
    전기적 퓨즈 소자 및 그의 동작방법 无效
    电熔丝器件及其操作方法

    公开(公告)号：KR1020100006059A

    公开(公告)日：2010-01-18

    申请号：KR1020080066222

    申请日：2008-07-08

    Applicant: 삼성전자주식회사

    Inventor： 성정헌 ,  조중래 ,  김덕기 ,  황수정

    IPC: H01L21/82

    CPC classification number: H01L23/5252 ,  G11C17/18 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: PURPOSE: An electric fuse device and an operation method thereof are provided to improve programming pre/post resistance ratio and have simple structure and small size. CONSTITUTION: An electric fuse device comprises a fuse(100) and a drive component(200). The drive component is connected to the fuse and comprises a resistance change layer whose resistance is changed according to applied voltage. The resistance change layer has a metal-insulator transition property. The drive component comprises two electrodes and the resistance change layer between the two electrodes.

    Abstract translation: 目的：提供一种电熔丝装置及其操作方法，以提高编程前/后电阻比，结构简单，体积小。 构成：电熔丝装置包括保险丝（100）和驱动部件（200）。 驱动部件连接到保险丝，并且包括其电阻根据施加的电压而改变的电阻变化层。 电阻变化层具有金属 - 绝缘体转移特性。 驱动部件包括两个电极和两个电极之间的电阻变化层。

    전기적 퓨즈 소자
    29.
    发明公开
    전기적 퓨즈 소자 无效
    电保险装置

    公开(公告)号：KR1020090121012A

    公开(公告)日：2009-11-25

    申请号：KR1020080047094

    申请日：2008-05-21

    Applicant: 삼성전자주식회사

    Inventor： 성정헌 ,  김덕기 ,  황수정

    IPC: G11C29/04 ,  G11C5/14

    CPC classification number: G11C29/787 ,  G11C17/16 ,  G11C17/18 ,  G11C29/808 ,  G11C2229/763

    Abstract: PURPOSE: An electrical fuse device is provided to be used after completing the assembly of a package of a semiconductor chip. CONSTITUTION: An electrical fuse device includes plural fuses(10), a power source and a voltage controller. The power source applies programming voltage to the fuses, and the voltage controller is connected to the power source. The plural fuses are connected to the voltage controller in parallel, and the voltage controller includes a diode(30) of which break-down voltage is 1-5V. The voltage controller is prepared between the power source and the plural fuses.

    Abstract translation: 目的：提供一种电熔丝装置，用于在完成半导体芯片封装的组装之后使用。 构成：电熔丝装置包括多个保险丝（10），电源和电压控制器。 电源对保险丝施加编程电压，电压控制器连接到电源。 多个保险丝并联连接到电压控制器，并且电压控制器包括击穿电压为1-5V的二极管（30）。 在电源和多个保险丝之间准备电压控制器。

    안티퓨즈와 그 동작 및 제조방법
    30.
    发明公开
    안티퓨즈와 그 동작 및 제조방법 有权
    反刍动物及其操作和制造方法

    公开(公告)号：KR1020090108457A

    公开(公告)日：2009-10-15

    申请号：KR1020080033880

    申请日：2008-04-11

    Applicant: 삼성전자주식회사

    Inventor： 김덕기 ,  성정헌 ,  최상무 ,  황수정

    IPC: H01L23/62

    CPC classification number: H01L23/5252 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: PURPOSE: An anti-fuse is provided to exclude a separate programming transistor by including a transistor structure. CONSTITUTION: An anti-fuse includes a first conductor(100), a second conductor(200), a dielectric layer, and a diffusion layer(120). The first conductor and the second conductor are separated. The dielectric layer is included between the first conductor and the second conductor. The diffusion layer is included between the dielectric layer and one among the first conductor and the second conductor. The dielectric layer includes one of Al oxide, Si oxide, and Si nitride. The diffusion layer includes Cr.

    Abstract translation: 目的：提供反熔丝以通过包括晶体管结构来排除单独的编程晶体管。 构成：反熔丝包括第一导体（100），第二导体（200），电介质层和扩散层（120）。 第一导体和第二导体分开。 介电层包括在第一导体和第二导体之间。 扩散层包括在介电层和第一导体和第二导体中之间。 电介质层包括Al氧化物，Si氧化物和Si氮化物中的一种。 扩散层包括Cr。

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